#osdev on 2024-09-30 — irc logs at libera.irclog.whitequark.org

2021-05-23 01:57 klange changed the topic of #osdev to: Operating System Development || Don't ask to ask---just ask! || For 3+ LoC, use a pastebin (for example https://gist.github.com/) || Stats + Old logs: http://osdev-logs.qzx.com New Logs: https://libera.irclog.whitequark.org/osdev || Visit https://wiki.osdev.org and https://forum.osdev.org || Books: https://wiki.osdev.org/Books

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12:30 <mcrod> ARM is annoying sometimes

12:30 <mcrod> why the hell do I need to drop into assembly to disable all interrupts?

12:33 <clever> mcrod: x86 is the same

12:33 <mcrod> still weird to me

12:34 <mcrod> see, with ARM I would expect the NVIC to expose a master bit

12:34 <clever> but accessing the NVIC involves a load/store operation, which costs extra clock cycles

12:34 <clever> there is a master irq enable/disable in the cpu itself, which can be accessed with a dedicated opcode

12:35 <clever> and then the cpu just ignores interrupts from the NVIC

12:35 <mcrod> yeah, cpsid i or something

12:36 <mcrod> but I don't know what situation you're in where you need to *disable interrupts* as fast as possible

12:36 <clever> a single-threaded mutex type thing

12:36 <clever> save and disable irq, modify something sensitive, re-enable irq

12:37 <clever> you want that as fast as possible, because you want the irq off for as little time

12:37 <clever> (oops, restore irq, not re-enable, ive caused that bug before!)

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12:58 <marshmallow> is there any particular reason why `mips_atomic_set` (https://elixir.bootlin.com/linux/v6.11/source/arch/mips/kernel/syscall.c#L189-L196) favours a syscall_exit to returning to userspace, rather than having a `eret`?

12:58 <bslsk05> elixir.bootlin.com: syscall.c - arch/mips/kernel/syscall.c - Linux source code v6.11 - Bootlin

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