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<GreaseMonkey>
revived my previous laptop recently - someone straight up gave me an SSD to replace the one that just died one day. shoved FreeDOS on the thing, and now i'm trying to make sense of whichever RTL8168x chipset is on this thing
<GreaseMonkey>
the rtgpkt driver doesn't work on this thing... eh, might as well boot up the Linux live CD and try the NDIS drivers and/or the ODI drivers
<GreaseMonkey>
but have been trying to poke the hardware directly for a bit
<GreaseMonkey>
based on Linux driver source it might be an RTL8168H
<zid`>
yea rtl816x is a massive family of very similar but slightly incompatible things
<zid`>
I've had ones that the kernel supports, kernel did not support, and kernel supported but badly, variously
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<GreaseMonkey>
welp, several months after getting 16-bit code running in a 64-bit Linux program, i have now finally managed to get 64-bit code running under FreeDOS
<GreaseMonkey>
and back again
<GreaseMonkey>
16 real -> 16 prot -> 32 prot -> 32 flat (stack changed here) -> 32 identity-paged using 64-bit paging -> 64 -> 32 flat, paging and long mode disabled here (stack changed back at end) -> 16 prot -> 16 real
<GreaseMonkey>
it took... uhh, let's guess 4-5 hours with breaks?
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<GreaseMonkey>
it also took probably about 20 or so reboots lol
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<zid`>
20 reboots is good going heh
<GreaseMonkey>
it just wouldn't be the DOS experience without them
<GreaseMonkey>
although i'm kinda cheating as this thing has an SSD in it
<GreaseMonkey>
which means a reboot takes like 5 seconds
<zid`>
cheating is using pxe, but sadly often the option rom is slow as shit
<zid`>
there are fast ones though
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<GreaseMonkey>
...ok, it was probably closer to 50 reboots, i kinda forgot that i tend to reboot whenever an error gets spat out by what's probably something part of the FreeDOS kernel, because i lost code once when i didn't do that
<GreaseMonkey>
basically, if something tells you you hit an invalid opcode, there's a chance you might have hosed memory
<GreaseMonkey>
and saving at that stage can result in your file becoming... 0 bytes
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<szstr>
i'm addicted to too many too muches through my awkherating sys------timz, 3erl with golang i got now, but now i want joba,,, i'm a kriori sk'''oiled
<nikolar>
is the llm having a stroke
<GeDaMo>
I'd expect an LLM to make more sense :|
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<szstr>
i'm a bad/too-saturated-with-ry'''ness tomato while Me-,onNetbook is True;;
<szstr>
my sys-tim does too much too easy
<szstr>
that or too much too much too non-slow
<szstr>
with christmas $(( 2006 add 20 )) i want a damnsmalllinu---uuhhh-kzshrrraah with 3 custom backgrounds that associate with me on a usssbh disk drygh
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<heat>
what the heck happened back there
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<Ermine>
cat walked over someone's keyboard
<GeDaMo>
I'd expect a cat to make more sense :|
<heat>
oh, that's understandable
<Ermine>
cats usually make less sense
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<_ngn>
im using a temporary paging setup to enter long mode right after boot which identity maps first 2mbs (as i followed the entering long mode guide) however i now need a proper paging setup to access more memory, the problem is that i cant create large enough page tables to map memory as only the 2mbs is mapped, to workaround this is there any way to directly access memory that is not paged?
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<heat>
i bootstrap 4GB of direct physical mappings (with page tables in bss), then later once i have some sort of memory allocation i get to map all of physical memory
<heat>
truly the big concept is having a way to map arbitrary pages
<heat>
then you can carve out some bits of the memory map for the real direct mapping
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<_ngn>
so theres no way to directly access memory thats not paged?
<heat>
yep
<_ngn>
damn
<_ngn>
another thing i wanna ask: is it a bad idea to map all the avaliable memory at once?
<heat>
no
<heat>
it's generally done (with large pages! 2MB or 1GB)
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<_ngn>
alright, thank you heat!
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<heat>
you're welcome
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<heat>
i have huge scheduling issues on my OS and i think they stem from not migrating tasks between CPUs :/
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<heat>
on a workload with _very minimal_ blocking (no contention even), i get around 66% idle :)
<heat>
basically a make -j4 that warms up the page caches, then clean, then make -j4 (this time with a flamegraph)
<heat>
yep, looks like that's the big issue, some basic thread rebalancing is working well
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<xamidev>
hey guys if you wanna take a look at my first "OS" project, which is still in early development, feel free: github.com/xamidev/blankos
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<GreaseMonkey>
dammit they left before i could say that it's definitely one of the OSes of all time
<GreaseMonkey>
it's kinda cute
<GreaseMonkey>
and it was easy to build from source
<nikolar>
Nice
<GreaseMonkey>
"Dynamic memory allocator (get memmap from GRUB?)" <-- this would ideally be the next thing to work on if that were me, those things are kinda really useful
<GreaseMonkey>
possibly paired with "Paging/Page Frame Allocation"
<GreaseMonkey>
also a "hlt" instruction would be nice too
<heat>
mjg, duude are vmexits global or are they per-cpu?
<heat>
i did some good fixups in the scheduler for cpu allocation and my make -j4 is now a lot more competitive with linux, but i have some 10s to shave off
<heat>
i think i have a lot of gratuitous IPIs, and naturally IO and all that will be a bit slower (otoh, i dont have meltdown)
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<geist>
per cpu
<heat>
ah, thanks
<geist>
benchmarking on KVM is very difficult. we bascially gave up with zircon due to vmexit overhead and whatnot
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<heat>
that's good at least. for instance SMIs are broadcast to every cpu
<geist>
it'll skew at the microlevel anything involving io, or interrupts,. or timers
<geist>
and *that* i s where the type of hardware matters a lot: AMD, intel, server hardware/client hardware ,etc
<geist>
depends on how much of the interrupt delivery is handled in hardware or how much of it needs to be a vmexit and handled in software
<heat>
yeah i'm not expecting super accurate and scientific results, just checking if my changes made a good difference, which they seem to have done
<geist>
AMD has an AVIC and intel has... i forget what it's called
<geist>
but basically hardware virtualized local apics
<geist>
that can handle a bunch of things directly, notably timers and IPIs
<geist>
without vmexits
<heat>
yep
<geist>
but those tend to either only be on modern hardware (ryzen+ for AMD) or on server hardware (for intel)
<heat>
one thing i'm realizing is that my address space is being insanely expensive
<heat>
easily the bottleneck here
<heat>
address space teardown, that is
<heat>
which might very well be because of the IPIs it's doing (for some reason, I don't quite understand why it's doing it)
<heat>
i'm thinking i can probably skip the TLB invalidation in general since i'm the last user of the address space
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<geist>
yeah that's true, also you probably want to get your IPIs figured out, since if it's by definition not active anywhere else you shouldn't have to do it
<geist>
which it shouldn't be active if it's not running
<geist>
maybe when the other cpus are going idle they're not unmarking the aspace as active?
<geist>
since presumbly you have at least a bitmap per aspace for which cpus have it active right now?
<heat>
yep i have a cpu mask per aspace
<geist>
yah that *should* have killed yoru need for IPIs if you've properly parked all the threads in a process before tearing it down
<heat>
these processes aren't even threaded :)
<heat>
i'm just doing a make -j4 of musl as a workload
<heat>
make, coreutils, gcc, cc1, ld.bfd are not threaded
<geist>
hmm, so yeah probably should figure out your IPIs first
<heat>
my address space management right now is a little confusing
<heat>
doing thread migration found me a bug where a kernel thread ran on a borrowed address space, the address space got killed and the machine triple faults
<geist>
yeah i pretty much always have a kaspace object for that and have kernel tghreads all belong to the kernel process
<geist>
including idle threads
<heat>
but that sucks cause then kernel threads need to switch address spaces
<geist>
yeah, life is rought
<geist>
get a real processor (ARM) where that's free
<heat>
linux has the concept of "mm" and "active_mm" and a user space process can even have an active_mm != mm in a lot of cases
<heat>
basically you can even lazily context switch
<geist>
yah but that means you instantly have exactly the problem you have
<geist>
where you can end up with things holding onto things that shouldn't etc
<geist>
causes a lot of complications
<heat>
well, they track things properly, I don't :)
* mcrod
pulls hair out of scalp
* mcrod
opens skull and throws brain out
<mcrod>
hi
<heat>
hi
<mcrod>
I thought you all should know
<mcrod>
if you are ever expected to debug a board that doesn't have a debug port, and by definition, doesn't have one
<mcrod>
you must do what I did to be moderately successful
<mcrod>
these are the words of mcrod
<heat>
cool story broseph
<the_oz>
make signal HOWEVER
<geist>
this is what they pay you the big bucks for
<mcrod>
yeah but I can't figure this out.
<mcrod>
it is *impossible* for me to do this
<geist>
saving the day by debugging the undebuggable
<heat>
you don't need a debug port to debug
<heat>
these are the words of heat
<mcrod>
that's correct, but my options are virtually nil
<the_oz>
it's not impossible, you just haven't thought hard enough about how you can signal
<heat>
do you have a led?
<mcrod>
what the fuck do you want me to do, send bytes via morse code?
<the_oz>
led, power off, whatever
<heat>
colors, morse code, whatever works for you
<mcrod>
there's only one color
<geist>
yes/ actually. i've done basically that with an led
<geist>
it really sucks
<heat>
i've debugged issues by manually plotting into the framebuffer
<mcrod>
some backstory
<the_oz>
one color over TIME
<the_oz>
:)
<mcrod>
I have to rewrite SPI slave's firmware with a new MCU
<mcrod>
I have the source code to the master
<heat>
motherboard people have a fancy 0x80 port they can use for an 8-segment display :)
<mcrod>
but the SPI decoder on the saleae logic analyzer isn't happy with any SPI configuration I'm throwing at it
<the_oz>
piezzoelectric beep
<mcrod>
well, more accurately, the first packet looks ok with certain settings, the next packet is pure garbage
<geist>
do you have a faster oscilliscope?
<mcrod>
I have a 500mhz oscilloscope
<geist>
maybe try to manually decode it
<mcrod>
the problem is the MCU isn't happy either
<mcrod>
e.g., it sees $28 when it should see $A3 (i.e., the two least significant bits are lost)
<kof673>
just reminds me of: > you must do what I did to be moderately successful > to find Flanders, I just have to think like Flanders. Homer's Brain: I'm a big four-eyed lame-o. And I wear the same stupid sweater every day...
<mcrod>
fun fact: the master bit bangs to the slave and the slave is listening by its hardware SPI, which "works"
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<mcrod>
the fact that a commerical-grade LA isn't giving me the right results according to the source code of what I have suggests to me we are doing something wrong
<mcrod>
and it "works"
<heat>
have you tried a MILITARY GRADE logic analyzer
<mcrod>
it's just insane
<mcrod>
i've been dealing with this problem for weeks
<mcrod>
SPI is not a hard protocol
<GreaseMonkey>
yeah SPI is definitely within the realm of manual decoding
<immibis>
i have manually operated SPI before
<immibis>
it impressed the other people present. "so can you make motor 4 go at full speed" "sure *click click click click click .....*"
<immibis>
on a labview computer interface, so debouncing wasn't a problem - i think someone else wanted to make a SPI interface module before testing the motors and I said: why don't we just hook up a couple of buttons
<immibis>
oh you said decoding, never mind
<GreaseMonkey>
it's the sort of party trick that would make people think you were an absolute genius
<immibis>
you know, you were probably in the building at the time, why weren't you on the VUW NIARC robotics team?
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<immibis>
party trick for robotics team lan parties maybe :P
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<GreaseMonkey>
idunno
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<netbsduser>
i'm implementing ePoll
<netbsduser>
the hot new readiness mechanism for the eCommerce age
<heat>
cool
<heat>
i'm looking at finally porting a package manager
<heat>
rpm depends on rust for package signing :)
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<kof673>
eh, i took a look at gpg 1.4 something or other since it has less dependencies, but they do not recommend it
<heat>
yeah
<kof673>
it will only get like very severe "security" patches, and should only be used for verifying old things
<heat>
" it is considered insecure and it's use is strongly discouraged" does not inspire confidence
<kof673>
lol
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<kof673>
and i believe it said they will not fix "side channel" attacks either
<kof673>
so has to be "very" severe lol
<geist>
heat: so you going to try to bring up rust?
<heat>
Eventually(tm)
<heat>
i have some old work on my drive i could try to resurrect
<the_oz>
side channel attacks are like ...
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<the_oz>
wtf are you going to do to that shit
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<the_oz>
I think not addressing it explicitly is the only sane choice as a provider of code
<the_oz>
or of an ABI or API or whatever
<the_oz>
because if side channel attacks are on your plate then you BY NECESSITY must variate the whatever from "the official" way
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<kof673>
well, a classic thing is say checking a password how long it takes to reject different attempts. so if it is limited and not some insane number of attempts, then there may still be easy mitigations. but it could be fixed in code as well, to not leak such information
<kof673>
not sure if that example applies, just ..i assume it depends on the particular attack
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<kof673>
and something like that, may not be clean, but could be fixed at a higher level/wrapper around the problematic code just to prevent leaking. not proper maybe, but...not impossible
<the_oz>
yeah something like that applies at a network level