sorear changed the topic of #riscv to: RISC-V instruction set architecture | https://riscv.org | Logs: https://libera.irclog.whitequark.org/riscv | Matrix: #riscv:catircservices.org
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<sorear> given higher level rvv code, could you share the indices between multiple macroblocks?
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<courmisch> good question. my guess without looking at the sources are:
<courmisch> 1) the upper code is too complex to write in assembler
<courmisch> 2) the code alternates between transforms so we can't just keep indices in vectors
<courmisch> but I could be wrong
<sorear> with a "completely ignoring how ffmpeg is designed" and "no effort for portability" hat you'd probably have the higher level code passing vector types, using compiler support
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<courmisch> turning LTO and autovec on, maybe
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<courmisch> but video codecs before HEVC and AV-1 didn't really have threaded decoding in mind
<courmisch> so you have to decode in the specified order, and you can't simply run the same transform in a loop
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<courmisch> I'd rather 1) hardware actually optimise tail-agnostic mode correctly
<courmisch> and 2) segmented loads and stores be optimised
<courmisch> those two things should be enough to get competitive perf gains for video coding
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<sorear> I don't think I'm saying anything about LTO or autovec, just that if you had a non-portable codec written with intrinsics register allocation would allow some vector stuff to be hoisted
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<courmisch> well maybe yes, but same problems either way
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<courmisch> one software change that might help would be signed pixel sample values
<courmisch> but that would be such hell to implement
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