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<nav_>
Hey all, quick question RE RISC-V debug spec: What's the difference between register addresses and register numbers? The CSRs have addresses (section 4.10), but the "access register" abstract command addresses the registers with "register numbers" (section 3.8.1.1).
<nav_>
It looks like the register numbers are the same as the register addresses, but I just want to confirm this
<nav_>
They seem to be the same because the CSR addresses match the CSR register numbers, it seems
<sorear>
the access register abstract command can access things that aren't CSRs, so they're two different namespaces, but some or all CSRs may be visible in both namespaces at the same position
<sorear>
access register numbers are 16-bit while CSR numbers in instruction encodings are 12-bit, for a very superficial difference
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<nav_>
ok cool, so I should probably treat them as two different address spaces. Thanks sorear!
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<nav_>
One more question: Does the spec define the register numbers? Section 3.8.1.1 allocates ranges for register categories (GPRs, CSRs, etc.), but it doesn't specify the exact number each register should be assigned.
<nav_>
Is this something that's left for implementation?
<nav_>
Can one RISC-V implementation assign register numbers different to another?
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<nav_>
For example, for WCH QingKeV4 RISC-V, mstatus is assigned the register number 0x300. Is that something WCH decided, or is it specified in the spec somewhere? I'm just trying to understand if I need to treat register numbers as target-specific
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<sorear>
there's a strong implication that the debug register numbers correspond to the encodings used in other specs
<sorear>
if you look at "CSR Listing" in the Privileged ISA spec, mstatus is encoded as 0x300 (a 12-bit number).
<sorear>
likewise I'd expect that CSR x15 should be at register number 0x100f and FPR f15 at 0x102f
<sorear>
this might be explicitly stated somewhere. I'm not sure if you can override it with gdb's xml data but doing anything other than a 1-1 correspondence will definitely break things
<sorear>
*GPR x15
<nav_>
ah, I didn't think to look at the privileged spec document! Thanks again sorear, that's cleared things up
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