sorear changed the topic of #riscv to: RISC-V instruction set architecture | https://riscv.org | Logs: https://libera.irclog.whitequark.org/riscv
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<mmind00> prabhakarlad: "call" is not a real instruction on its own, but expands to 2 instructions ... auipc + jalr
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<conchuod> geertu: resolution is trivial, but I picked up a riscv/cpus.yaml patch so I figure Stephen will find a conflict between us tomorrow.
<geertu> conchuod: Seems like I missed the context?
<geertu> conchuod: IC. This is far from unexpected, isn't it? ;-)
<conchuod> Yeah, it's the one we mentioned may conflict before.
<conchuod> Was just an FYI
<geertu> conchuod: So that's why all these patches should go through the risc-v tree...
<conchuod> eh, risc-v or soc makes no real different there
<geertu> Anyway, it's a small conflict, so sfr and linus can handle it
<conchuod> Aye.
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