sorear changed the topic of #riscv to: RISC-V instruction set architecture | https://riscv.org | Logs: https://libera.irclog.whitequark.org/riscv
<conchuod> mmind00: check https://lore.kernel.org/linux-riscv/YqYz+xDsXr%2FtNaNu@Sun/ if you want to see me struggle to understand what the correct order is..
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<conchuod> There's my reply to the patch itself and then some more w/ me and Samuel Ortiz
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<dinklebink> does box86/box64 work on RISC-V?
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<cousteau> Hi!
<cousteau> Are there any extensions / plans for an "add with carry" instruction? I understand that such an instruction can be replaced with two regular add + one sltu, but I guess if someone's doing lots of bigint arithmetic they'd benefit from this potential 3:1 reduction
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* cousteau was thinking on an instruction encoding with up to 3 dedicated "one-bit carry registers" so that you could put your carry wherever you wanted
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<conchuod> Dinklebink: their last commit is fixing the riscv build, so I would assume so
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<conchuod> smaeul: is d1/all is the most up to date D1 tree?
<smaeul> conchuod: yes, though I'm just a few minutes away from sending v2 of the main DT series and rebasing everything
<conchuod> Oh cool. I am just messing around with this test app someone gave me for the timer stuff.
<conchuod> But it's got a hardcoded 4 for 4 harts in it & most of the source is missing so idk if it'll even work on the d1
<smaeul> if you want to play with the SBI timer, you can remove the `select SUN4I_TIMER` from Kconfig.socs and add a CLINT to U-Boot's DT like in https://github.com/smaeul/linux/commit/9496edef9edad6eb4a3c6808b0d81fe68754f02f#diff-b0d89c6dc8b0030e70bfc0fe36160170753014b38b7ce1f3d3874189dfad660bR1391
<smaeul> though you'll need to use a compatible string that OpenSBI supports already
<conchuod> Yeah, that's exactly what I want to do, thanks :)
<conchuod> btw smaeul: "// FIXME: no riscv architecture support for cpufreq"
<conchuod> Does that need more done that just enabling the menu?>
<conchuod> than*
<smaeul> no, that's already taken care of. don't look at the rest of that commit :)
<conchuod> Yeah, I was gonna say that that menu was now enabled.
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<conchuod> smaeul: dumb question - the dt changes to u-boot are only needed b/c you pass u-boots dt to the os?
<smaeul> no, they are needed so OpenSBI loads its CLINT driver
<smaeul> nothing to do with the OS
<conchuod> Thanks.
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<conchuod> smaeul: been playing around with it for a bit - running into issues getting ethernet to come up in {u-boot,linux} if I disable that timer
<smaeul> but otherwise things work?
<conchuod> idk, I can't boot since all my stuff is over tftp/nfs :(
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<smaeul> what does dmesg look like?
<conchuod> I'm gonna go reply to Anup again & maybe look at it again tomorrow. Lemme rebuild and I'll do that.
<conchuod> btw, which is worse in your book - sbi timer not working properly on d1 or being unable to get out of suspend?
<smaeul> being unable to get out of suspend*
<smaeul> * as long as SBI timer isn't actually used, which it won't be unless we change OpenSBI to reserve the sun4i-timer, but in that case SBI timer would be able to get out of suspend
<conchuod> I'm not 100% sure what my u-boot dt looks like, for that - I think I reverted all changes I made so that I'd be okay to try your dt v2 patchset - but it is getting stuck in the same place with the u-boot dt changed also.
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