sorear changed the topic of #riscv to: RISC-V instruction set architecture | https://riscv.org | Logs: https://libera.irclog.whitequark.org/riscv
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<geertu> somlo: thx, I will give it a try. Unfortunately testing is hard, as lately I tend to get lots of CRC errors when uploading the image :-(
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<somlo> geertu: trying to wrap my head around this: if you're getting CRC errors during an upload, then isn't the problem in the bios rather than the kernel ?
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<conchuod> bjoto: Think I figured out what it was that was breaking stuff. Not sure the fix yet, I'll just revert what got changed in my CI.
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<geertu> somlo: yeah, crc errors are unrelated. I used to get less of them, though.
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<conchuod> bjoto: fixed...
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