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<
f_ >
chewitt I pushed to my repo yesterday, if you want you can test it on your WP2
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<
f_ >
Do as I said yesterday and write to an SD card with: `doas dd if=u-boot-gxbb-with-spl.bin of=/dev/bootdev conv=fsync,notrunc bs=512 seek=1`
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10:23
<
f_ >
Kwiboo: Wanna have fun with SPL again?
10:24
<
f_ >
I'll finish DRAM init today and will let you test with different rank settings.
10:24
<
f_ >
(if you want :) of course)
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17:18
<
f_ >
Time for testing!
17:19
<
f_ >
I added support for other rank settings
17:19
<
f_ >
but I think I missed some stuff...
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<
f_ >
^ should be ok
17:37
<
f_ >
Time to work on gxl!
17:38
* f_
hooks up his lepotato to UART
17:39
<
f_ >
It's a really nice SBC, so why not make it nicer by running SPL on it..
17:56
<
Kwiboo >
f_: Great and nice work!, I will test your updated code later :-)
17:57
<
f_ >
Let's see if gxl runs BL2 at EL3 or at EL1
17:57
<
Kwiboo >
Did some quick tests on my Wetek Hub yesterday, used the c2 build and it worked, after I wrote 0 to sector 0 of emmc
17:58
<
f_ >
One more working device!
17:58
<
f_ >
Kwiboo: I'd guess it worked after a few resets though, because of DRAM
17:58
<
f_ >
Wrong DRAM rank mode.
17:58
<
Kwiboo >
I think the hub use same rank, wp2 use diff rank
17:59
<
f_ >
Thought WeTek Hub used different ranks.
17:59
<
Kwiboo >
but it got configured with 2gb ram so u-boot behaved strange
17:59
<
f_ >
Kwiboo: Yeah the DRAM size was hardcoded
17:59
<
f_ >
I fixed that and now it writes the size set in CONFIG_DRAM_SIZE
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18:03
<
Kwiboo >
I also tested a quick run on my old odroid-n2, rev0.4 20190307, s922x/g12b, and it started SPL in EL3 same as c4/sm1
18:10
<
f_ >
I seem to remember in the TF-A docs that if BL1 isn't TF-A it's expected that BL2 runs at EL3...
18:10
<
f_ >
Let me find that real quick
18:11
<
f_ >
>When the platform has a non-TF-A Boot ROM it is desirable to jump directly to BL2 instead of TF-A BL1. In this case BL2 is expected to execute at EL3 instead of executing at EL1. Refer to the Firmware Design document for more information.
18:15
<
Kwiboo >
btw, I will try to finish up and send out a small mmc pwrseq patch allow disable in SPL, and possible another related to spl_board_prepare_for_boot not being called before jumping to atf
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