sorear changed the topic of #riscv to: RISC-V instruction set architecture | https://riscv.org | Logs: https://libera.irclog.whitequark.org/riscv | Matrix: #riscv:catircservices.org
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<khem> sami: here is image + kernel - https://busybox.net/~kraj/rv32.tar.xz, I have also added run.sh which has the cmd to run it in qemuriscv32, you need to install the qemu on your system. The kernel Image included is the one where the patch is reverted. So when you login into booted qemu with user 'root' with no password you can run journalctl and see that logs are printed. then use latest master kernel Image and you will see that journal
<khem> is not started and there is nothing in journal upon login
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<sami> khem: Thanks, that's helpful, but the kernel image in the archive is a broken symlink. Can you also share the kernel config you're using?
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<sorear> apparently running kernels in Legacy mode with Capability mode userland _is_ a feature they want to keep :(
<courmisch> I don't see the point exposing Zvl in hwprobe, TBH. That'd be a Linux-specific interface where the ISA already has an interface that works everywhere (reading vlenb)
<courmisch> if you want to break V down into component extensions, then exposing Zve32x, Zve32f and Zve64x is more relevant, though there is no hardware that subsets V so far anyhow
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<courmisch> IMO, "embedded" subsets don't really need to be discoverable via hwprobe, because they are, well, embedded
<courmisch> palmer, unlord ^
<courmisch> also Zvl*b adds up to 12 different (32...65536) mutually exclusive extensions, so the hwprobe bitmask is very ill-suited
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<arichardson[m]1> sorear: in an ideal world we would not need this since it simplifies the extension, but I can think of many cases where this feature is actually desired
<arichardson[m]1> thank you by the way for all your very insightful issues and pull requests, really appreciate them!
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<sorear> courmisch: hwprobe has a cpumask argument, i have no idea how we're going to make heterogenous not suck for software but there's more information
<sorear> meowray: yes but that was a mispost meant for #musl
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<sorear> arichardson[m]1: mm. I do feel a bit like I'm fumbling around in the dark to find which use cases are and aren't necessary and to whom...
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<palmer> probably best to just post on LKML? that way anyone with use cases can chime in, my general theory for the hwprobe stuff is that if someone wants to use it that's probably a good enough argument to make it visible
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<khem> sami: my bad, I have updated the tarball with proper kernel image and also added defconfig which is used to build the kernel
<khem> please download again and lemme know
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<scrts> Does anyone know if there's a small microcontroller available in the market that is automotive grade and ISO26262 ASIL-B capable? Need something similar to Cortex-M0+ capability rather than huge application core running at hundreds of MHz
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<palmer> scrts: I don't think there is? Renesas has some MCUs, but they don't appear to be automotive
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