sorear changed the topic of #riscv to: RISC-V instruction set architecture | https://riscv.org | Logs: https://libera.irclog.whitequark.org/riscv | Matrix: #riscv:catircservices.org
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<la_mettrie> hm, didn't notice any set_rate calls on those mainline linux's drivers for jh7110. are pll clock frequencies supposed to be set from u-boot..?
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