_florent_ changed the topic of #litex to: LiteX FPGA SoC builder and Cores / Github : https://github.com/enjoy-digital, https://github.com/litex-hub / Logs: https://libera.irclog.whitequark.org/litex
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<somlo> so I tried programming my ecpix5 board after a few weeks of working with another board, and realized my old workflow is no longer working: https://pastebin.com/cJ7QiUQB
<tpb> Title: $ openocd -f openocd_ecpix5.cfg -c 'transport select jtag; init; svf lamdaconcep - Pastebin.com (at pastebin.com)
<somlo> latest litex[-boards], built bitstream, trying to push it to the board with openocd, getting nowhere.
<somlo> either I am screwing up something so obvious I'm blind to it, or I missed something while not paying close attention :)
<somlo> I'd have tried an older commit to see if it worked and I could start bisecting, but trouble is there's several repos involved, so not sure how one would bisect across multiple repos :) I'm not *that* good with git (and git bisect) :D :D
<somlo> and here: https://pastebin.com/Pj5wB64R is what happens in `dmesg` after I plug the board in, and after I issue the `openocd` command... No idea what that looked like back when things worked :D
<tpb> Title: #### this gets logged to `dmesg` after I plug in the ecpix5 via USB:[1097822 - Pastebin.com (at pastebin.com)
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