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<drewfustini>
anyone in here been working with ACPI on RISC-V? I'm trying to understand the RISC-V FFH spec with regards to CPPC for frequency scaling. I can't tell if ACPI registers are intended to be actual memory mapped registers on an SoC or if ACPI registers are more of an abstract concept.
<drewfustini>
(I've only used DT until now so I'm been trying to learn as much as I can about ACPI)
<conchuod>
courmisch_: that k230 canmv really has an awful first time experience.
<conchuod>
I get a box with a board and no instruction at all as to what to do with it or where to get software.
<drewfustini>
sorear: thanks. yeah, I've been reading the SBI extension and the FFH spec (https://github.com/riscv-non-isa/riscv-acpi-ffh/blob/main/riscv-ffh.adoc). For a theoretical RISC-V SoC, I am wondering what the OpenSBI code would actually do when trying to set something like DesiredPerformanceRegister. I am thinking that maybe that would correspond to some memory mapped register in the SoC memory map.
<drewfustini>
I know this is all the platform specific details but I've not found any examples yet of how this could work
<conchuod>
and of course they do the "create an sdk with every repo copy-pasted inside of it" which makes it just that bit more annoying
<drewfustini>
I'm trying to define the register interface between a system control processor in an SoC and the general compute harts in an SoC. It seems like it would be good to implement a scheme that would be compatible with ACPI CPPC registers... but I am struggling to understand how that is supposed to work
<drewfustini>
I'm trying to imagine what a real SoC might do and if it is reasonable to expect that an SoC would have the CPPC register set somewhere in its memory map.
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<drewfustini>
palmer: unfortunately I missed the patchwork call. I noticed the ACPI CPPC driver was just merged. Was there any discussion of that?
<palmer>
no. Is there something wrong with it? I don't really understand ACPI, so I sort of just defer to Sunil here
<palmer>
oh, sorry, I just saw your messages down the thread
<palmer>
so ya, there's probably a bug in some set of systems? not super surprising for new stuff, but I think what's there is better than nothing
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<palmer>
it's just failing to probe, so I think we're not worse having this than having nothing
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<drewfustini>
Yes, I don't think it was wrong to merge. I'm just eager to learn more about it. I'm new to ACPI so I've been trying to ramp up on it, particularly with regards to the best way to implement processor power management.
<drewfustini>
I am still trying to understand how the CPPC cpufreq is intended to work and I've been looking at Arm. Anyways, I'll communicate more with Sunil as my understanding grows.
<drewfustini>
In general, ACPI is not particularly useful until the IRQ support lands as currently one has to have all I/O devices disabled in Qemu when using ACPI.
<drewfustini>
My interest is try to mock up how the compute harts running Linux should be communicate power states with a systems management processor. Sorear pointed out RPMI earlier so I'm looking at that now.
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<palmer>
drewfustini: ya, cool. I also don't really know anything about ACPI, and I don't have a setup to test it. So if you figure out something that works then LMK ;)