<osdev199>
Hi, while creating the first i/o completion queue in my nvme driver, it is failing with the status code 2 (Invalid Field in Command). I have double checked my commands and still I can't figure out which cmd is invalid.
<bslsk05>
pastebin.com: uint32_t cdw0 = 0x00010005; /* cdw0: cid 1, prp used (15:14 clear), fuse nor - Pastebin.com
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<Mutabah>
osdev199: Using qemu?
<Mutabah>
I've often gone and read the qemu source to find these issues (and sometimes added/enabled debug prints)
<osdev199>
Mutabah: no I'm not using qemu. I'm testing it on my real machine.
<Mutabah>
aaah
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<vin>
https://elixir.bootlin.com/linux/v6.10.2/source/mm/swap.c Does anyone understnd how swapiness actually works in linux? Like when does it stop swapping, when the memory pressure is dealt with? even though there are unused pages?
<vin>
I wish there was a forumala for the 'swappiness' knob, that I could do some estimations
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<azonenberg>
Can someone explain to me what ".type funcname, %function" does in an assembly function?
<azonenberg>
on armv7-m specifically using gnu assembler
<azonenberg>
And why this is necessary to avoid bad code generation at link time for far jumps?
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<Mutabah>
Not sure why it impacts the assembler's translation, but it flags that section of the binary as being a function for the executable format's debug info
<azonenberg>
Mutabah: well i was getting bad blx instructions if i didnt use it in arm thumb code, but only for far calls
<azonenberg>
like, sequences of bytes that i think were supposed to be a blx or a ldr.w
<azonenberg>
but actually disassembled as garbage and crashed the cpu with a usage fault
<bslsk05>
stackoverflow.com: assembly - Bad BLX instruction generated when calling asm function from C function (gcc on STM32H753) - Stack Overflow
<azonenberg>
this really seems like it should have thrown an error at link time, i specified -mcpu=cortex-m7 so it should have never emitted an instruction that didn't make sense for thumb2
<Mutabah>
azonenberg: I assume you read the answer that explains the need for THUMB code to have the low bit set?
<azonenberg>
Mutabah: yes. what i dont understand is why the linker didn't complain
<azonenberg>
there should be no situation in which a compiler for a CPU that only supports thumb code would emit a jump instruction to an even address
<Mutabah>
It's not a linking problem, it _is_ a change in codegen
<azonenberg>
if it sees a situation where it thinks that's the right course of action, something is wrong
<azonenberg>
i.e. the correct behavior is to error out rather than silently generating malformed code
<Mutabah>
When doing an indirect jump to code - you need to know if that code is THUMB or ARM. By default, an unmarked symbol is assumed to be ARM
<azonenberg>
since there is no ISA-legal way to encode the requested behavior
<azonenberg>
yes, but again
<azonenberg>
if you are -mcpu=cortex-m7 there is no non-thumb support in the processor
<azonenberg>
if you think you should be generating arm code, someone screwed up and that should result in a compiler diagnostic not a silent generation of illegal instructions
<Mutabah>
ah, linker bug I guess?
<Mutabah>
s/linker/compiler-assembler/
<bslsk05>
<Mutabah*> ah, compiler-assembler bug I guess?
<azonenberg>
it would be like trying to use an avx instruction when compiling x86 code with -march=haswell or similar
<azonenberg>
if you think that's the right thing to do, it's not possible in your target ISA, therefore you should refuse to proceed
<azonenberg>
don't silently generate a binary that will SIGILL
<Mutabah>
Kinda, but not quote
<Mutabah>
The SIGILL happens _after_ the jump
<azonenberg>
as far as i can see that isn't what's happening here
<azonenberg>
the jump itself is malformed
<Mutabah>
the jump is "valid".... maybe?
<azonenberg>
gdb disassembles it as a bfcsel (an armv8 instruction)
<azonenberg>
ida dissassembles it as a blx with a nonsensical target outside my address space
<azonenberg>
i dont think either is correct, it's simply an invalid/malformed sequence of bytes that isn't a thumb instruction
<azonenberg>
04 f0 1f e5
<Mutabah>
TBH, I have no idea what's happening her
<azonenberg>
yeah me neither, adding the .type fixes it
<azonenberg>
but i cant understand why this wasn't statically caught
<azonenberg>
if you need .type on all exported symbols from assembly code, fine
<azonenberg>
but that should be enforecd at compiler time, and if the linker is asked to emit a jump to an even address on a thumb target it should refuse
<Mutabah>
A guess here:
<Mutabah>
The disassembly is wrong, because the disassembler doesn't know that it needs to disassemble as THUMB
<Mutabah>
and the UD happens on the jump, because it's trying to jump to non-thumb
<azonenberg>
that could be why gdb is doing it wrong
<azonenberg>
but i explicitly told IDA this was thumb code (T=1)
<azonenberg>
and to disassemble it as such
<azonenberg>
so i believe ida's disassembly more
<Mutabah>
IDA is a tracing disassembler, so it may make the same mistake
<azonenberg>
yes, it had T=0 originally in this code
<azonenberg>
i overrode it
<azonenberg>
to force it to disassemble as thumb
<azonenberg>
anyway, the bad disassembly is an unrelated issue
<azonenberg>
generating bad code without an error is what i have an issue with
<azonenberg>
this is not the first time that i've written code that was undeniably wrong, but that IMO the compiler should have been able to statically know was wrong and warn/error about
<azonenberg>
half the compiler's job is to save me from my stupidity :p
<azonenberg>
i opened a bug/feature ticket a while back for gcc failing to warn in a corner case around constructor ordering when using virtual inheritance
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<toyBeaver>
quit
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<nikolar>
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<zid>
/part and /quit were riding in a boat, but /part fell overboard, who was left on the boat?
<Ermine>
/quit
<nikolar>
lel
<zid>
This next one will either disconnect me for badwords list, or disconnect someone else
<zid>
let's find out
<zid>
[16:19] #osdev Cannot send to nick/channel
<zid>
badwordsed :p
<nikolar>
kek
<nikolar>
send privately
<zid>
can't, have to do discord
<vdamewood>
What's the bad word you can't send?
<zid>
I can't tell you
<nikolar>
he litelrally can't
<zid>
It's on the badword list, if you try to PRIVMSG it it just rejects it
<GeDaMo>
You have to get evitaerc :P
<mjg>
rot13 mofos
<mjg>
alternative you encode it
<mjg>
Currently Using windows NT
<nikolar>
my condolences
<mjg>
what is that encoding
<nikolar>
today i learnd that glibc has a function called memfrob (memory frobnicate)
<gorgonical>
ARMv8-A reference manual, D4-2151 shows an XN/UXN bit in the attributes field for a page descriptor
<gorgonical>
min0911: only the manuals are authoritative. Consider the wikis like a blogpost, in that it's partial information filtered through someone's opinion of what's important and/or interesting.
<gorgonical>
for further information: a lot of the content on the wiki is introductory or basic. It's not wrong, but you are not going to find a thorough, wiki-fied version of how to rebuild NetBSD from the ground-up explaining all of its design decisions and such
<gorgonical>
It *may not* be wrong
<min0911>
it seems that the nx bit exists in x86_64 not x86?
<nikolar>
i think that's correct
<gog>
min0911: XD == NX
<nikolar>
maybe i am wrong
<gorgonical>
NXE is in the IA32 EFER fwiw, but I'm still looking
<gog>
NX is available when PAE and EFER.NXE
<gog>
legacy paging does not have it
<kof673>
> Consider <everything ever> like a blogpost, in that it's partial information filtered through someone's opinion of what's important and/or interesting.
<gorgonical>
good point
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<zid>
NX is the top bit in 64bit tables is all I remember
<nikolar>
good job zdi
<nikolar>
zid
<zid>
ty
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<Matt|home>
anyone here huge sci fi fans? also greetings o\
<mjg>
that's unlkely
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<sham1>
Hello Matt at home
<nikolar>
oi
<Matt|home>
o\
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<heat>
kernel
<nikolar>
KERNAL
<heat>
Ermine, i want to be clear and say that ftruncate does not in any way match fallocate's functionally
<heat>
twasajoke
<Ermine>
ah ok
<heat>
ftruncate only adjusts the file size (and free unreachable blocks if required), fallocate can e.g set a size and *actually* allocate space on disk
<heat>
or create a file hole in the middle of a file
<andydude>
Matt|home: yes
<heat>
mjg, does freebsd have a struct path analog? or are vnodes inherently mount-specific?
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<Ermine>
til perf understands i915 events
<Mondenkind>
fallocate more like phallocate amirite
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<nikolar>
no
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<mjg>
heat: there is no "path"
<Ermine>
there's "goal"
<heat>
stay_hard(2)
<mjg>
besdies the question is wrong
<mjg>
indoes are also inherently mount specific on linux mofo
<heat>
no
<mjg>
it's lack of dentry as a concept
<heat>
inodes are sb specific
<heat>
dentries are also sb specific
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<mjg>
oh right, linux supports multiple mounts
<mjg>
forgot about that loller
<heat>
there's some funny bzns you need to do on .. because of it, d_parent can't Just Work
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<Ermine>
What's the difference between cpu_atom and cpu_core perf events?
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