_florent_ changed the topic of #litex to: LiteX FPGA SoC builder and Cores / Github : https://github.com/enjoy-digital, https://github.com/litex-hub / Logs: https://libera.irclog.whitequark.org/litex
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<mikek_DE1SOC> hello all: Looking for HELP!! I have mu DE1SOC board working with Linux, booted over serial. But Trying to toggle LEDs, as per here!
<mikek_DE1SOC> But, The Class and GPIO do not seem to exist? Are they located somewhere else? Any help is eternally greatful!
<tpb> Title: Oh hey, I was just playing with this... it's really cool! There's a "Linux on Li... | Hacker News (at news.ycombinator.com)
<mikek_DE1SOC> Also Tried above, but did not work...
<mikek_DE1SOC> :(
<openpowerwtf> may be dependent on platform definition, where physical pins are assigned
<mikek_DE1SOC> The Platform is the DE1SoC
<mikek_DE1SOC> here's what I have for /sys/class
<mikek_DE1SOC> oot@buildroot:/sys/class# ls -lrt
<mikek_DE1SOC> total 0
<mikek_DE1SOC> drwxr-xr-x 2 root root 0 Jan 1 00:07 vtconsole
<mikek_DE1SOC> drwxr-xr-x 2 root root 0 Jan 1 00:00 net
<mikek_DE1SOC> drwxr-xr-x 2 root root 0 Jan 1 00:07 vc
<mikek_DE1SOC> drwxr-xr-x 2 root root 0 Jan 1 00:07 tty
<mikek_DE1SOC> drwxr-xr-x 2 root root 0 Jan 1 00:07 spidev
<mikek_DE1SOC> drwxr-xr-x 2 root root 0 Jan 1 00:07 spi_master
<mikek_DE1SOC> drwxr-xr-x 2 root root 0 Jan 1 00:07 pwm
<mikek_DE1SOC> drwxr-xr-x 2 root root 0 Jan 1 00:07 mtd
<mikek_DE1SOC> drwxr-xr-x 2 root root 0 Jan 1 00:07 mmc_host
<mikek_DE1SOC> drwxr-xr-x 2 root root 0 Jan 1 00:07 misc
<mikek_DE1SOC> drwxr-xr-x 2 root root 0 Jan 1 00:07 mem
<mikek_DE1SOC> drwxr-xr-x 2 root root 0 Jan 1 00:07 mdio_bus
<mikek_DE1SOC> drwxr-xr-x 2 root root 0 Jan 1 00:07 input
<mikek_DE1SOC> drwxr-xr-x 2 root root 0 Jan 1 00:07 i2c-dev
<mikek_DE1SOC> drwxr-xr-x 2 root root 0 Jan 1 00:07 i2c-adapter
<mikek_DE1SOC> drwxr-xr-x 2 root root 0 Jan 1 00:07 hwmon
<mikek_DE1SOC> drwxr-xr-x 2 root root 0 Jan 1 00:07 graphics
<mikek_DE1SOC> drwxr-xr-x 2 root root 0 Jan 1 00:07 fpga_manager
<mikek_DE1SOC> drwxr-xr-x 2 root root 0 Jan 1 00:07 drm
<mikek_DE1SOC> drwxr-xr-x 2 root root 0 Jan 1 00:07 devlink
<mikek_DE1SOC> drwxr-xr-x 2 root root 0 Jan 1 00:07 bsg
<mikek_DE1SOC> drwxr-xr-x 2 root root 0 Jan 1 00:07 block
<mikek_DE1SOC> drwxr-xr-x 2 root root 0 Jan 1 00:07 bdi
<mikek_DE1SOC> The other issue is that the memory location of the CSR are not the same, from the gateware to the Linux sys.. :(
<mikek_DE1SOC> the CSR output from my DE1SoC build...
<mikek_DE1SOC> #--------------------------------------------------------------------------------
<mikek_DE1SOC> #--------------------------------------------------------------------------------
<mikek_DE1SOC> # Auto-generated by Migen (a5bc262) & LiteX (46cd9c5a) on 2021-11-13 20:43:27
<mikek_DE1SOC> csr_base,ctrl,0xf0000000,,
<mikek_DE1SOC> csr_base,identifier_mem,0xf0000800,,
<mikek_DE1SOC> csr_base,uart,0xf0001000,,
<mikek_DE1SOC> csr_base,timer0,0xf0001800,,
<mikek_DE1SOC> csr_base,led,0xf0002000,,
<mikek_DE1SOC> csr_base,sdram,0xf0002800,,
<mikek_DE1SOC> csr_base,switches,0xf0003000,,
<mikek_DE1SOC> csr_register,ctrl_reset,0xf0000000,1,rw
<mikek_DE1SOC> csr_register,ctrl_scratch,0xf0000004,1,rw
<mikek_DE1SOC> csr_register,ctrl_bus_errors,0xf0000008,1,ro
<mikek_DE1SOC> csr_register,uart_rxtx,0xf0001000,1,rw
<mikek_DE1SOC> csr_register,uart_txfull,0xf0001004,1,ro
<mikek_DE1SOC> csr_register,uart_rxempty,0xf0001008,1,ro
<mikek_DE1SOC> csr_register,uart_ev_status,0xf000100c,1,ro
<mikek_DE1SOC> csr_register,uart_ev_pending,0xf0001010,1,rw
<mikek_DE1SOC> csr_register,uart_ev_enable,0xf0001014,1,rw
<mikek_DE1SOC> csr_register,uart_txempty,0xf0001018,1,ro
<mikek_DE1SOC> csr_register,uart_rxfull,0xf000101c,1,ro
<mikek_DE1SOC> csr_register,timer0_load,0xf0001800,1,rw
<mikek_DE1SOC> csr_register,timer0_reload,0xf0001804,1,rw
<mikek_DE1SOC> csr_register,timer0_en,0xf0001808,1,rw
<mikek_DE1SOC> csr_register,timer0_update_value,0xf000180c,1,rw
<mikek_DE1SOC> csr_register,timer0_value,0xf0001810,1,ro
<mikek_DE1SOC> csr_register,timer0_ev_status,0xf0001814,1,ro
<mikek_DE1SOC> csr_register,timer0_ev_pending,0xf0001818,1,rw
<mikek_DE1SOC> csr_register,timer0_ev_enable,0xf000181c,1,rw
<mikek_DE1SOC> csr_register,led_out,0xf0002000,1,rw
<mikek_DE1SOC> But in the Linux system it points to a different Address location????
<mikek_DE1SOC> root@buildroot:/sys/bus/gpio/devices# ls -rlt
<mikek_DE1SOC> total 0
<mikek_DE1SOC> lrwxrwxrwx 1 root root 0 Jan 1 00:31 gpiochip0 -> ../../../devices/platform/soc/f0003000.gpio/gpiochip0
<mikek_DE1SOC> root@buildroot:/sys/bus/gpio/devices#
<openpowerwtf> do the verilog i/o look ok? serial, led, etc. pins are there?
<mikek_DE1SOC> yup.
<mikek_DE1SOC> LED are flashing right now... But with baremetal...
<openpowerwtf> ahhh, good...but i haven't gone the distance to linux yet :)
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<mikek_DE1SOC> thanks for your help
<mikek_DE1SOC> Night...
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<jeffdi> Hello. This is Jeff DiCorpo from Efabless.com. We are working on a project to utilize Litex to generate the management SoC block as part of a full ASIC design used by the Google sponsor Open MPW program. The repo can be found here… https://github.com/efabless/caravel_mgmt_soc_litex.
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<openpowerwtf> would the user area then be a module also?
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<sajattack[m]> rad
<_florent_> Hi jeffdi, nice, thanks for sharing. Happy to help if you have questions/issues or just want to discuss specific points
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<sajattack[m]> _florent_: any ideas why I'm having issues with crossover uart after a litex update?
<DerekKozel[m]> Is Sean Blakley in the chat? I'd enjoy chatting about Thunderbolt. I have a udev script that could be useful for him.
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