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20:58
<
sajattack[m] >
sweet
20:58
<
_florent_ >
ilia__s: nice PR, I'll test it tomorrow. Have you been able to upload some binaries over litex_term with it? If so, I'm just curious of the speed
20:59
<
sajattack[m] >
were you able to reproduce my issue with the crossover litepcie_util uart_test?
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<
sajattack[m] >
or do you think it will go away with this pr?
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21:01
<
_florent_ >
sajattack[m]: sorry I was busy with other things, so haven't tested yet and think #63 is probably the way to go for uploading binaries over PCIe with litex_term
21:01
<
sajattack[m] >
right, makes sense
21:02
<
sajattack[m] >
assuming whatever is wrong with my crossover doesn't affect #63 as well
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<
mikek_DE1SOC >
Hi Florent: I am having trouble with my GPIO pins with the Risc-V Cpu.
22:04
<
mikek_DE1SOC >
I have the Risc-V Working on my DE1-Soc board, again.. :)
22:04
<
mikek_DE1SOC >
ACtually I have it working on the DE10Nano board too... but the SDram is not liking it..
22:05
<
mikek_DE1SOC >
But my DE1-SoC board I cannot toggle the GPIO pins. I was trying to follow this...
22:06
<
mikek_DE1SOC >
But the /sys/class loation is not there..
22:07
<
mikek_DE1SOC >
I am using the most recent linux_2021_03_29.zip (5.12-rc4) image.
22:07
<
mikek_DE1SOC >
Any help would be great!
22:07
<
mikek_DE1SOC >
Thanks!
22:18
<
mikek_DE1SOC >
I found stuff in this directory.....
22:19
<
mikek_DE1SOC >
oot@buildroot:/sys/firmware/devicetree/base/soc# ls
22:19
<
mikek_DE1SOC >
#address-cells interrupt-parent
22:19
<
mikek_DE1SOC >
#size-cells name
22:19
<
mikek_DE1SOC >
bus-frequency ranges
22:19
<
mikek_DE1SOC >
compatible serial@f0001000
22:19
<
mikek_DE1SOC >
gpio@f0003000 soc_controller@f0000000
22:19
<
mikek_DE1SOC >
interrupt-controller@f0c00000
22:19
<
mikek_DE1SOC >
root@buildroot:/sys/firmware/devicetree/base/soc#
22:25
<
mikek_DE1SOC >
oh man I am So close!
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