<aurel32>
there are many things broken now (linux, opensbi, u-boot, probably glibc)
<aurel32>
I wonder if distributions should switch the default from rc64gc to rc64gc_zicsr_zifencei, although I am not sure it's supported for older versions of gcc or llvm
<aurel32>
also it seems to mean we have to rebuild the world if we want to get rid of the warnings like /usr/bin/ld: warning: /usr/lib/gcc/riscv64-linux-gnu/11/crtn.o: mis-matched ISA version 2.0 for 'd' extension, the output version is 2.2
<The_Decryptor>
That feels like something you wouldn't do "mid release", though it'd trip up users on rolling release distros
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<alMalsamo>
qwestion: Thanks a lot, but I don't want some shitty LCD screen I want displayport
<qwestion>
alMalsamo: alibaba (same co) is planning a smart phone next year apparently, so that'll be 2-3 yrs judging by recent common delays
<alMalsamo>
Hmm I want a machine with external monitor and keyboard/mouse to use as a desktop
<enthusi>
alMalsamo: the Unmatched it is then?
<alMalsamo>
enthusi: Naw I don't want to support SiFive cuz they make proprietary chips
<alMalsamo>
Also the Unmatched doesn't seem to have a video out port, but it has x16 PCIe slot but I have no idea what GPU I would use on it, I am not sure if Intel makes PCIe GPUs yet or if they would even work on a RISC-V machine
<alMalsamo>
I think the StarFive JH7100 is also non-libre like SiFive chips
<enthusi>
a wide range of AMD gpus work well in the Unmatched
<enthusi>
and RISCV is not about open hardware CPUs...
<alMalsamo>
enthusi: Yes that's not a positive thing in my opinion, it seems like a hostile environment for libre computing for the most part. But some of Alibaba's cores are Apache 2 licensed to I would buy them maybe.
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<jrtc27>
aurel32: g does include zicsr+zifencei, the problem is many things don't use g
<jrtc27>
either because they don't want fd, in the case of bootloader-y things that want just ima(c)
<jrtc27>
or because they want configurability and just build up the various parts of imafdc dynamically, like glibc/freebsd/linux
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<aurel32>
jrtc27: i have done a few rebuilds, and i confirm the issue only happens for software that set -march explicitly
<aurel32>
we need to fix them, the question is to know since when -march=rv64imac_zicsr_zifencei is supported in binutils
<aurel32>
depending on that we might have to check for the binutils version to decide which -march to use
<jrtc27>
dunno, but clang doesn't
<jrtc27>
it's going to be a mess for a while
<aurel32>
:(
<jrtc27>
at least lld has just never bothered to check isa version consistency
<jrtc27>
so we don't have *that* problem...
* jrtc27
wonders what happens if you try and use __builtin_cycle_counter() or whatever with this new gnu toolchain... does gcc catch the lack of zicsr or does it end in an assembler error on the generated code?...
<jrtc27>
ditto __builtin_flush_icache() or whatever it is on bare-metal where it makes to fence.i...
<jrtc27>
*maps
<aurel32>
dunno, so far I have only been forced to use the binutils change, not yet the gcc one
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<aurel32>
so -march=rv64imac_zicsr_zifencei is not supported by older version of binutils. We need to rely on detection then
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<aurel32>
otoh it seems to be supported by gcc 11, so that's good news
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<geertu>
jrtc27: Give it a try on godbolt.org?
<jrtc27>
doesn't have newer than 10.2
<jrtc27>
really annoying
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<gordonDrogon>
well... My 'frankenterpreter' has just printed 'Hello, world' from my BCPL OS bootstrap sequence compiled into Cintcode interpreted by an ever growing RISC-V assembler program.. interpreted by a BCPL program compiled into cintcode interpreted by a big 65815 assembler program on a system running at 16Mhz. It's not fast.
<gordonDrogon>
Time taken: 311.478 No. instructions: 443742, 1424 inst/sec.
<gordonDrogon>
now to take out the debugging until it breaks ...
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<gordonDrogon>
an improvement: Time taken: 11.290 No. instructions: 18313, 1622 inst/sec.
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<qwestion>
Where do asm/jit writers hang out? Is the spec final enough to write these for browser js engines, jvm etc?
<qwestion>
Runtime engines generally I suppose
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<jrtc27>
IMAFD have been ratified for several years now
<jrtc27>
they're not changing
<jrtc27>
uh and C
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<gordonDrogon>
I suppose I'm an 'asm' writer - I hang out here ;-)
<gordonDrogon>
I'm writing a bytecode interperter/vm in RV asm ..
<gordonDrogon>
quite enjoying it compared to the last time I did this - I can keep all state in the registers with plenty left over.
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<lagash>
qwestion: try finding the intersection between the members of ##asm and here for a start :)
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<qwestion>
gordonDrogon: nice, im considering working/ learning+contributing to effort to speed up riscv ports, I have no asm experience, how much will arm and amd64 asm experts know already that will help them in riscv? How many extra hrs or pgs?
<qwestion>
lagash: Thx!
<gordonDrogon>
I don't use ARM, so no real experience there, however I've been coding in many other assemblers for over 40 years - they're all the same, but different ... (I know, not helpful - sorry!)
<gordonDrogon>
currently I'm re-writing something in 65c816 asm into RV32-IM asm.
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<gordonDrogon>
and my project is completely freestanding, so existing libraries, no headers, etc.
<jrtc27>
if you've seen one risc-like assembly you've seen them all
<jrtc27>
x86 is about the only thing you're likely to know that doesn't directly carry over
<gordonDrogon>
sparc and i860 are the other RISC ones I've used.
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<jrtc27>
but if you can wrap your head around x86 you can probably deal with the nicer risc-like ISAs
<gordonDrogon>
fortunately I have managed to completely avoid x86 although I came close with some 8085 40 years ago...
<gordonDrogon>
compared to 65c816, RV is a joy to use!
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<qwestion>
> if you've seen one risc-like assembly you've seen them all
<qwestion>
That sounds like I would be at disadvantage and not nearly as needed as I would want...maybe it just takes time, even if there are enough experts?
<gordonDrogon>
it takes time and energy.
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<gordonDrogon>
I started to learn RV by writing my own emulator for it - then got some simple C programs compiled in a freestanding manner to work in it, then started my project.
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<aurel32>
jrtc27: I confirm that from the as point of view rv64gc includes zicsr+zifencei
<aurel32>
that said with gcc 11 (I haven't tried gcc 12 with the corresponding patches), gcc translates -march=rv64gc into -march=rv64gc -march=rv64imafdc so that doesn't work
<aurel32>
if gcc 12 fixes that, it means we probably want to backport that fix
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<jrtc27>
lol
<jrtc27>
what a mess
<aurel32>
found a: # TODO: We should expand g to imad_zifencei once we support newer spec