sorear changed the topic of #riscv to: RISC-V instruction set architecture | https://riscv.org | Logs: https://libera.irclog.whitequark.org/riscv
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<Esmil> mmind00: i wanted to try your svpbmt patches, but they don't seem to apply to either v5.16 or Linus' latest master
<Esmil> mmind00: oh, nevermind. read the full coverletter now
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<la_mettrie> i'm looking for sources to understand the (assumed) technical superiority of riscv ISA and main points of the debate. if you have anything particularly good in mind, suggestions are welcome
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<la_mettrie> i wonder if this page gives an adequate picture about why riscv should be efficient https://erik-engheim.medium.com/the-genius-of-risc-v-microprocessors-b19d735abaa6
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