sorear changed the topic of #riscv to: RISC-V instruction set architecture | https://riscv.org | Logs: https://libera.irclog.whitequark.org/riscv
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<gordonDrogon> thwarted by the (gcc) optimiser! Testing my RV emulator and using -O0 through -O3 to check different instructions and I was getting different results - turned out I'd forgotten a 'volatile' in the source code and the compiler conveniently optimised it out. Ah well!
<la_mettrie> that's elementary!
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<gordonDrogon> elementary, but easy to forget - especially as it was working almost all the time - a 'virtual uart' in this case...
<gordonDrogon> I ended up looking at the assembly output, going through cut/sort/uniq and comparing the opcodes used in both versions - that found another bug I had, so was worthwhile too.
<gordonDrogon> the -O3 version uses 22 unique opcodes and the -O0 version 21. (not that relevant, but interesting to me)
<gordonDrogon> I'm writing my emulator by adding more and more into this little C program and writing the missing opcodes, one at a time...
<gordonDrogon> anyway enough for tonight - supper time now :)
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<gordonDrogon> intersting. maybe I'll port wiringPi to it ...
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