sorear changed the topic of #riscv to: RISC-V instruction set architecture | https://riscv.org | Logs: https://libera.irclog.whitequark.org/riscv
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<Sofia> pierce: Not quite a "write up" but something. Enjoy! Hopefully it just works. Assumes sh, curl, tar and unshare are available. https://gist.github.com/sofia-snow/ac83819310931c175aff771abdd23dad
<Sofia> Not quite complete. Needs more to run apk. Haven't dived deep enough to fix that.
<Sofia> It is 7.6 MiB with a broken apk, or 5.2 MiB with just busybox (and qemu-riscv64)
<Sofia> Bah. My editor ate the \x.
<Sofia> Disabled the APK part because broken.
<Sofia> Of course read the script and run it in its own directory. :)
<Sofia> I'd call it complete with just apk working because then you can install gcc et al.
<Sofia> Probably other core packages necessary, but once apk works you can get them.
<Sofia> I'm done with this for now. Might revisit in the future.
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<Sofia> There is of course the full rootfs in edge. https://dl-cdn.alpinelinux.org/alpine/edge/releases/riscv64/
<Sofia> Not done for now I guess. But... that minirootfs seems to also not have a working apk out of the box.
<Sofia> XD
<Sofia> It is smaller than I expected. 2.3 MiB compressed. 5.6 MiB extracted.
<Sofia> The issue seems to be networking.
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<Sofia> /DNS
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<Sofia> (Yes.. I overengineered a script to download and extract two archives. And do a little tweaking.)
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<la_mettrie> what might be a good assembly project with Longan Nano in order to learn about the system programming...
<kehvo> Perhaps interfacing with an external IC, like a retro soundchip, and building something around that and the display? Add some buttons, and you've got, for example, a self-made physical fantasy console :)
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<la_mettrie> hm, that sounds rather a kind of application level stuff? but it would teach something about system issues as well?
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<sorear> what are you considering systems?
<sorear> any idea if it has PMP?
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<kehvo> la_mettrie: dealing with timers, interrupts and external input (be it sound or just buttons, for example, but why not something else too)
<kehvo> There arent many peripherals in the device to do complex things I think
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<la_mettrie> okay, sounds promising
<la_mettrie> hm, string "mtimecmp" isn't found from linux kernel. so they do interrupts in some other way
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<Finde> doesn't the m in mtimecmp mean machine mode?
<Finde> thus it wouldn't be in the kernel?
<Finde> it'd be accessed from sbi instead
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<jrtc27> mtimecmp is, sadly, not a real csr, for $reasons it was turned into a memory-mapped register left up to the platform
<jrtc27> M-mode linux calls it clint_timer_cmp
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<jrtc27> for S-mode linux/freebsd timer interrupts are scheduled as finde says by sbi calls, where firmware will poke the memory-mapped intended-for-m-mode mtimecmp
<jrtc27> though at the end of last year the Sstc (Supervisor extension S-mode time compare) extension got ratified
<jrtc27> which adds an stimecmp
<jrtc27> and is an actual CSR
<jrtc27> (see sbi_set_timer in linux and freebsd)
<jrtc27> (called that because that's what the SBI spec calls it)
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