_florent_ changed the topic of #litex to: LiteX FPGA SoC builder and Cores / Github : https://github.com/enjoy-digital, https://github.com/litex-hub / Logs: https://libera.irclog.whitequark.org/litex
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<cr1901> Element doesn't care about the Libera bridge IME
<whitequark[cis]> well then just yell at them until they do
<whitequark[cis]> if enough Matrix users get banned for being annoying in IRC channels they'll eventually do something
<whitequark[cis]> (I am already quite sick of fixing stuff Element should have been fixing years ago)
<whitequark[cis]> * stuff Element-the-company should
<cr1901> Worth a shot. The recent issue you closed (don't remember the issue #) made me smile w/ your snark
<whitequark[cis]> I don't really like being snarky in issue reports, but Matthew's excuses such as "we can't work on the IRC bridge because of the French" are tiresome
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<josuah> Ok I bite the LiteX bullet: adopted! :D
<josuah> the big argument: reproductibility
<josuah> using Verilator to design something on LiteX using *bus*, the moving it onto *harware*, with *toolchain* (swap any *word* with anything else) is either working, either having a bug to solve
<josuah> but even with bugs to solve, it is a huge leap forward from having each of these *parts* hardcoded onto one project