16:32 <sensille> can i tell litescope to record the startup?

19:57 <_florent_> jevinskie[m]: I was also doing this mistake and it was pretty painful to have to recompile just for this... and it was only visible in the verilog since CSRs were correctly collected.

19:59 <_florent_> sensille: If recording signal just after startup: this is not really supported. But you could add a reset to the core you want to observe at startup, control this reset over a CSR and trigger LiteScope on this reset

20:48 <sensille> there is a reset csr but it does nothing to how the cpu behaves. i'm still totally at loss what's going on here, need to poke at it a few more days