_florent_ changed the topic of #litex to: LiteX FPGA SoC builder and Cores / Github : https://github.com/enjoy-digital, https://github.com/litex-hub / Logs: https://libera.irclog.whitequark.org/litex
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<sensille> i fail to add multiple ethernet interfaces, i get the error that eth_rx is not found. "eth_rx" is hardcoded in liteeth/mac/core.py. i'm unsure how to find the correct cd name there
<_florent_> sensille: The error message should display the clock domains of your design, you should be able to figure it out (ex eth_phy0_eth_rx) and use this to do the integration
<sensille> yes, but how do i pass this to LiteEthMACCore? can't it query the clock domain names from the phy?
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