05:53 <Guest76> Hi, Is there any examples of how to use GPIO with litex?

06:56 <Guest76> Hi, Is there any examples of how to use GPIO with litex?

10:44 <Shatur> Is it possible to add my own ip core to simulation in litex_sim? If yes, how?

13:28 <_florent_> Shatur: Adding cores to litex_sim is similar than adding core to a regular design, you can also follow the wiki for this. The main restriction is that the core will have to be supported by Verilator.

13:39 <Shatur> _florent_: Sorry for a stupid question, but where I can find a target for it? For real hardware I see targets in boards directory. Is there something like this I can modify fo litex_sim?

13:59 <Shatur> Oh, there is litex/litex/tools/litex_sim.py, I need to modify it?

14:12 <_florent_> Shatur: yes

14:12 <_florent_> that's the equivalent of the targets

14:14 <Shatur> Thank you!

18:03 <jevinskie[m]> Shatur: it’s pretty simple. Here is an extension of serial2tcp that adds framing via length encoding https://github.com/jevinskie/litex/commit/86a6d234a10db5ec58a6f08fd634d20218afa8a4

18:04 <jevinskie[m]> Guest76: take a look at https://github.com/enjoy-digital/litex/blob/481857ad0a73c8fed7257bf028577413536c9caa/litex/tools/litex_sim.py#L288

18:15 <Shatur> Anyone encountered the following error? rust-lld: error: section '.text.dummy' will not fit in region 'spiflash': overflowed by 18446744073675997184 bytes

18:16 <Shatur> I trying to build my "hello world" firmware for svd and memory files from litex_sim

18:17 <Shatur> Here is the parameters I used: litex_sim --csr-svd=hal/litex_sim_pac/soc.svd --memory-x=hal/litex_sim_pac/memory.x --with-spi-flash --cpu-variant=minimal