04:14 <Seth12345> I got disconnected before I saw any responses if there were any, but I asked this last night and was wondering if anyone knew now: "Hi, I am trying to port LiteX to the Upduino 2.0 and have the platform/target files about 99% there I think, but I can't figure out the clock. I believe the Upduino 2.0 only has the internal clock unless you connect

04:14 <Seth12345> the clock output to a pin with a jumper of some sort. I can't figure out how to tell LiteX to use the internal oscillator for a clock signal. Anyone know how to do that? The Upduino 2.0 uses an ICE40UP5k FPGA (same as Icebreaker)"

06:32 <_franck_> bentomo: https://github.com/enjoy-digital/litex/blob/master/litex/soc/integration/builder.py#L284

06:33 <_franck_> then eventually: https://github.com/enjoy-digital/litex/blob/master/litex/soc/integration/soc.py#L868

10:02 <_florent_> just for info, I'm currently wrapping AXI modules from https://github.com/alexforencich/verilog-axi to simplify use in LiteX: https://github.com/enjoy-digital/litex_verilog_axi_test

10:02 <_florent_> this should give us lots of new interesting AXI modules to play with :)

10:49 <bentomo> _florent_: Thank you! :)

11:00 <leons> _florent_: A small update from my side regarding 10Gbit/s Ethernet. I've finished my thesis now which means I'm going to lose access to the NetFPGA-SUME board which I used to develop on in the near future. Meanwhile the Ethernet stack seemed to work pretty well at the end, and I'm already reusing a Verilog-version of the XGMII to stream bridge at $work (should have some minor fixes to the LiteEth variant ready soon-ish)

11:01 <leons> Regarding the development board: do you already have a canonical development / reference board for LiteEth with 10Gbit/s Ethernet support (i.e. SFP+ cages) in mind?

11:02 <leons> I still have access to the NetFGPA-SUME for a few days and can take the opportunity to clean up the codebase and create a PR to litex-boards with the transceivers configured, etc. That might be a good starting point for people who'd like to develop this further, but I won't be able to maintain it / test any changes...

11:06 <leons> The XEM8320 looks really interesting for that purpose, but it's super pricey :)

12:43 <_florent_> leons: Congrats for your thesis and thanks a lot for your contributions on the project! The Kintex7 boards from Aliexpress are probably the cheapest option to run the 10Gbps Ethernet (~200-300euros).

12:44 <leons> _florent_: thanks! can you point me to one of those?

12:44 <_florent_> leons: This would be great to have a PR to LiteX-Boards for the NetFPGA-SUME, as you said, this could be used a reference to enable 10Gbps Ethernet on other boards

12:45 <_florent_> leons: this for example: https://fr.aliexpress.com/item/1005002760455757.html

12:45 <tpb> Title: Xilinx – carte de développement Fpga, Pcie, Fiber Kintex7 10G | AliExpress (at fr.aliexpress.com)

12:46 <_florent_> I have it, not sure I tested the SFP+ on it, but was able to get the DDR3/1GbpsEthernet/SDCard working IIRC

12:46 <leons> It does look really weird :D

12:47 <_florent_> otherwise I have several boards I can use for 10Gbps but those are more expensive (KC705, KCU105, BCU1525, etc...)

12:48 <_florent_> leons: That's the Ali-Express style :) (but pretty sure the designer is very experimented and just want to reduce costs).

12:49 <_florent_> leons: the boards are delivered with examples design to test all the interfaces (SFP, PCIe, DDR3, etc...)

12:49 <leons> Yeah, I think the most important thing for me is to eventually get this all working on a board you have access too, to validate changes. But the litex_sim implementation of XGMII seems really as well, so that might just be sufficient to test most of the changes.

12:51 <leons> If all goes according to plan I'm going to stay in academia a little longer and might get access to a board with SFP+ in the not too far future, for now I'm not convinced at spending that kind of dough on an FPGA, given that my Arty-A7 seems fine for 95% of what I do :)

12:51 <leons> s/seems really/seems really solid

12:54 <_florent_> Sure I understand, the Arty-A7 is also really convenient for most of thing I work on and always on my desk

12:55 <_florent_> leons: Is your thesis published/accessible by the way? I would be curious to read it if so.

12:56 <leons> _florent_: I'd like to wait for it to be graded first, then I might upload it somewhere :)

12:57 <_florent_> leons: sure, I was just curious, thanks

17:11 <jevinskie[m]> For a dual SFP+ board with pcie but not much else IO there is the gidel HawkEye arria 10. Watch ebay for a week and you’ll usually see them pop up for $140. Get one and help me out with the SFP bringup! :P https://www.ebay.com/itm/265450537532

17:11 <tpb> Title: Gidel HawkEye-20G-48 4GB DDR4 Intel Arria 10 FPGA PCIe Accelerator Card | eBay (at www.ebay.com)

20:45 <bentomo> _florent_: I GOT A UART PROMOT FIRST TRY! Sadly ddr didn't train but that's probably more likely due to my .5ns misses in timing. XD I was too eager to see if I the soc would even start going in blind. This build suite is nuts. I'm still trying to get through the learning curve