narmstrong changed the topic of #linux-amlogic to: Amlogic mainline kernel development discussion - our wiki http://linux-meson.com/ - ml linux-amlogic@lists.infradead.org - official channel moved from Freenode - publicly logged on https://libera.irclog.whitequark.org/linux-amlogic
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<f_> hmm is orangecms here now
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<f_> https://mamot.fr/@vitali64sur/111186875288616661 more stuff going on in the fediverse.
<f_> lvrp16: not sure how or why but I noticed my lepotato was a little bent
<f_> just a little, so it still works fine
<f_> Could be the case or it was always like that
<f_> I think it's the case
<f_> and for some weird reason lepotato fits better in that Pi3 case than the Pi3 itself lol
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<CyReVolt> hello there :) I'm the one who started https://github.com/orangecms/aml_boot - pleased to meet y'all!
<f_> hi CyReVolt !
<f_> Glad to see you here!
<f_> ^ lvrp16
<lvrp16> CyReVolt: hi
<f_> ^ librecomputer folk
<CyReVolt> Yup, with huge thanks again to Libre Computer for giving out hardware at Kernel/Embedded Recipes <3
<CyReVolt> hi lvrp16 :)
<f_> They'll be giving the same hardware to me too :) + the lepotato and lafrite they already donated
<CyReVolt> woop woop :)
<lvrp16> Yeah toys are always fun.
<f_> Indeed
<lvrp16> But the community does a lot more than us.
<lvrp16> And we benefit.
<CyReVolt> I'm also involved in the oreboot project (coreboot fork without C / written in Rust), and I'd be delighted to have some Amlogic support. So far, we have 3 RISC-V SoCs and I translated lots of DRAM init. :D
<f_> Driven by the community.
<f_> CyReVolt: oreboot :D
<f_> Heard of it before. Pretty cool.
<CyReVolt> I'll be at Open Source Firmware Conference https://osfc.io next week and give a status update. I am not sure if we'll have live streams; otherwise, recordings will be published some weeks later or so.
<f_> although I tend to always say that 'rust is rusty' lol
<CyReVolt> Heh, tbh, I'm just glad to have it. I'm used to it, I don't really know how to write C (can read it mostly though unless there is heavy pointer void whatever hackery xD). ^^
<CyReVolt> So yea, you wrote that you looked at the blob that does DRAM init for the Amlogic GX (I think?) SoCs; I am not yet too familiar with their generations/families etc.. Is there a wiki somewhere, like the linux-sunxi wiki? I looked at Wikipedia, which has quite some overview, but still not too easy to navigate and missing some bits.
<f_> CyReVolt: https://linux-meson.com/ has a very nice image narmstrong made with the SoC families
<CyReVolt> And I have to admit that I am not yet too familiar with the whole bl1,2,3 etc stuff in aarch64 boot flows. It seemed to me, just from what I looked at, there is a lot of per vendor / per SoC custom stuff, so it's hard to generalize again, and the initial design was already a bit messy. =)
<CyReVolt> Ah, right, Meson is the codename - thanks!
<f_> I can explain if you want
<f_> 'meson' is getting deprecated in favor of 'amlogic' IIRC
<f_> amlogic gxbb rather than meson gxbb
<CyReVolt> You mean regarding the domain / community naming, or is that how the vendor markets it?
<f_> The vendor markets the SoCs by their 'real' name
<f_> e.g. Amlogic S905
<f_> Look at the image I just sent. It should be self-explanatory.
<CyReVolt> right, I'm looking at it rn :)
<CyReVolt> I found that amlogic_notes repo by lineageos folks as well that lists SoCs from another POV again
<f_> I can explain the boot process
<CyReVolt> excellent - let me reboot here and I'll be back in a few minutes; upgrading laptop firmware
<f_> Actually I should add that to my moinmoin instance
<f_> CyReVolt: sure
<CyReVolt> oh well it'll take a while still for other things to download
<f_> ¯\_(ツ)_/¯
<CyReVolt> So yea, I also added some notes to my repo. I wonder how many mask ROM protocols there are. Some are reimplemented in software again, like in the vendor U-Boot etc., IIUC? Can you list those, or is that also still a mystery to you? So far I know the GX thingy (S905X, S905D3) and the ADNL thing (from S905X4).
<f_> Haven't looked much at USB mode. I initially just wanted to be able to load U-Boot into DRAM and have it boot linux.
<f_> We can do that now on GXBB/S905, just need to repeat for GXL/S905X/S805X :D
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<f_> ^ simplified boot process
<f_> ^ CyReVolt (please check logs)
<f_> I didn't say anything about BL2 loading BL21 because that's not true
<f_> BL2 and BL21 are bundled together to make one image, which BL1 loads into SRAM
<f_> BL2 merely just runs whatever's supposed to be in BL21's supposed board_init() function address
<f_> Could be the same for SCP
<f_> TIL that it actually means System Control Processor
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<CyReVolt> sorry, took longer than anticipated - had to fix the firmware update tool xD
<f_> Don't worry.
<f_> Check the backlog
<CyReVolt> Do you know what the L in GXL and BB in GXBB mean, respectively?
<CyReVolt> ah in thx re SCP - I literally thought they implemented some kind of stripped down SSH for "secure cp" xD
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<f_> lol
<f_> CyReVolt: BB means Baby and L seems to mean light
<f_> Generation 10 Baby
<f_> Generation 10 Light
<CyReVolt> Seriously? lol :D nice ^^
<f_> indeed.
<f_> amlogic codenames make less and less sense
<f_> SM1 means ???????????
<CyReVolt> So I'm looking at the fancy flow https://moin.vitali64.duckdns.org/AmlogicBL2/Common/BootProcess
<f_> S4 ??????????????????
<f_> T7 ?????????????????????????????????
<CyReVolt> is the ACS thing injected at runtime?
<f_> no
<f_> it's just a C struct inside BL2 that's painfully replaced by a custom board-specific one by running a python script
<f_> "replaced with..."
<CyReVolt> ah so at build time
<CyReVolt> gotcha
<f_> Indeed
<CyReVolt> I know the idea of HOBs (hand over blocks) from UEFI designs, so I thought it might be similar; like, one component does a detection and other stuff, then hands over to another that also needs part of the detected information
<CyReVolt> anyway, could you expand on the SCP acronym on that boot process page? :)
<f_> Just means System Control Processor
<CyReVolt> Or do you have a collection of acronyms?
<CyReVolt> I mean, I know it now, just thought would be good to have it where all the acronyms appear so you don't need to remember them all
<f_> No, but upstream arm trusted firmware-a docs does
<CyReVolt> Oh they define it? I thought it was a custom Amlogic thing, thanks!
<f_> No SCP isn't a custom Amlogic thing
<f_> it's just optional for SoCs to have one
<CyReVolt> okay next stupid question
<f_> No question is stupid :D
<f_> go on
<CyReVolt> I have seen a bunch of those "GXBB:BL1:08dafd:0a8993;FEAT:EDFC318C;....." etc messages
<CyReVolt> do you know how to interpret them? Some bits are intuitive, like GXBB, BL1, and the final part, which can be SPL, USB, etc
<f_> somewhat
<f_> the final part is never 'SPL' BTW
<CyReVolt> ah sorry
<CyReVolt> I confused things
<CyReVolt> the missing linebreak made me think it was part of the first line
<f_> lol
<CyReVolt> but yea I remember, they just print it without a break, so after some resets, you have a loooooong line
<f_> that 'SPL: Restarting execution at EL3' comes from U-Boot SPL
<CyReVolt> yea got that now :)
<f_> CyReVolt: Yeah they don't output newline chars for some reason :X
<CyReVolt> Should I ever meet someone from Amlogic, I'd be really curious how they work... :D
<CyReVolt> The bundled Lua interpreter they have alongside their newer adnl tool looks a bit wild.
<f_> GXL:BL1:9ac50e:bb16dc;FEAT:ADFC318C:0;POC:3;RCY:0;EMMC:0;READ:0;0.0;CHK:0;
<f_> ^ GXL BL1 log
<f_> It's very much similar to GXBB, but am too lazy to hook up my GXBB set-top box to UART :D
<f_> Fun fact: that GXBB set-top box is the hardware I used to port U-Boot SPL
<f_> I don't have anything else that's GXBB
<f_> so I rely on Kwiboo's ODROID-C2 too :D
<f_> (he also helped me a whole lot to get SPL to work)
<CyReVolt> oh cool
<CyReVolt> I have run an Android aarch64 kernel on my S905X4. Wild. When at some point I saw that they had more than 300 instances of the AMLOGIC Kconfig flag, I just shuddered. xD
<CyReVolt> A friend of mine also has an ODROID-C2!
<f_> lol
<CyReVolt> He's currently struggling with booting from an SD card :D
<CyReVolt> something with voltage selection fun
<CyReVolt> anyway, let me dig out something
<CyReVolt> I have those lines
<CyReVolt> SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:9;RCY:0;USB:0;
<CyReVolt> SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
<CyReVolt> so I thought the last part tells what the boot source is
<f_> It doesn't
<CyReVolt> USB for mask ROM loader protocol and SPI NOR for SPI NOR flash
<f_> CHK -> amlogic header check
<f_> ah
<f_> on older SoCs it's just 'SPI'
<CyReVolt> yea so it reads from SPI NOR flash, looks for their header, find it and then boots
<f_> Repeats for every single device supported and then fallbacks to USB mode
<CyReVolt> ooh
<CyReVolt> hang on
<f_> If you flick the SPI/MMC switch you'll see that it checks eMMC as well
<CyReVolt> so I tried writing a blinky to SRAM the other day and then run it
<f_> and SD card, etc
<CyReVolt> so even for loading to SRAM, I need a specific header above the binary?
<CyReVolt> because I also saw this CHK stuff, I recall
<CyReVolt> and wondered why I saw no blinky :(
<CyReVolt> neither did a hello on the UART work
<f_> USB mode is different IIRC
<CyReVolt> huh
<f_> I didn't dig deeper into USB though
<f_> as I never use it for anything, except on lepotato where I just use pyamlboot to fire up U-Boot and enable UMS for writing to eMMC.
<CyReVolt> I should try though and try writing that header. I saw that there are multiple projects for doing fancy things with images/binaries.
<f_> meson-tools only works on gxbb and gxl
<CyReVolt> yea that's good enough for me
<f_> You probably want mkimage/amlimage
<CyReVolt> I have a Khads VIM1 / S905X (GXL?)
<CyReVolt> Khadas*
<f_> S905X is gxl indeed
<CyReVolt> okay cool
<CyReVolt> so there is also gxlimg and meson64-tools
<CyReVolt> are they equivalent or partially overlapping?
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<CyReVolt> I mainly started aml_boot because I found that pyamlboot didn't have everything and the vendor tool update is really horrible
<f_> all of them are made to sign bl2 and all other images
<f_> amlimage is different in that regard
<f_> It only signs bl2 so that BL1 loads it
<f_> written by Kwiboo :D
<CyReVolt> Okay. So does Amlogic also work with a header without a signature? I am used to sunxi / Allwinner, which is much simpler - just some bytes of a header with a checksum suffice.
<f_> ^ header
<CyReVolt> Hmm Kwiboo doesn't ring a bell to me, I think. What I want to do is work with the USB loader right away. Do I *have* to have BL1,2,3 etc? I am not too familar with Arm / aarch64 yet. I suspect that switching ELs requires multiple binaries. But technically, I could stay in the initial EL and access everything, correct?
<f_> BL1 is in ROM
<f_> AFAIK the BL1 USB mode is only used to load BL2
<f_> BL2 then goes into its USB mode and waits for all other images
<CyReVolt> Oh, okay, gotcha!
<f_> except if that BL2 is actually my U-Boot SPL build
<f_> in that case it will panic()
<CyReVolt> So when I tell the mask ROM to loader something to SRAM and run it, that thing I give it is treated as BL2?
<f_> I think so, yes.
<CyReVolt> Thank you so much, I already learned a ton!
<f_> Np :D
<f_> ^ SPL will panic if booted from USB
<CyReVolt> For each and every vendor/platform/ISA/whatever, everything is always named different, which is pretty annoying....
<f_> their old codenames made sense though
<f_> GXBB, GXL, G12A, G12B
<f_> that made a little sense
<CyReVolt> I started https://github.com/platform-system-interface/psi-spec to write all of that down. I have an initial table with a handful of platforms in comparison for a start.
<f_> CyReVolt: feel free to steal that ASCII art I made
<CyReVolt> haha yea it's awesome :)
<f_> It, along with the rest of my wiki is CC0
<f_> so public domain
<CyReVolt> I might redo that in draw.io :)
<f_> Do whatever you want :D
<f_> CyReVolt: but yeah, if you have a gxbb device and want U-Boot SPL to panic, just send it via USB
<f_> task successful
<CyReVolt> haha xD
<f_> but since narmstrong said yesterday that it would be nice to implement USB mode when I asked...TODO
<CyReVolt> So with the U-Boot mkimage, I can create the header - nice. mkimage -T amlimage etc etc :)
<f_> I don't feel like wanting to implement the amlogic worldcup protocol though
<f_> CyReVolt: yes
<f_> somehow
<f_> amlimage only exists on my tree and Kwiboo's.
<CyReVolt> worldcup is the protocol that devices showing up as GX-CHIP offer, right?
<f_> Indeed.
<CyReVolt> thanks
<f_> at least that's what the amlogic folks say.
<CyReVolt> well I just built from your wip/spl branch, so I have the tool I need now :)
<CyReVolt> soooooo... will I see a blinky? Let's see!
<CyReVolt> (will be back later and report :D)
<f_> >Amlogic usb protocol is extended from libusb (www.libusb.org) and called WorldCup.
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<CyReVolt> soooo... no blinky for me
<f_> didn't it work before?
<CyReVolt> f_: how do you build and load your SPL? Do you add the header before running it?
<CyReVolt> When I did the blinky before, I used the WorldCup protocol to do MMIO.
<CyReVolt> In this instance, I transfer a binary instead and run it.
<f_> With some devicetree hackery I let binman run amlimage for SPL and use FIT images for the rest
<f_> CyReVolt: Got UART logs?
<CyReVolt> and the amlimage SPL is what you run via pyamlboot ?
<f_> no
<f_> Never tested
<CyReVolt> Oh okay, so you ran that from SD card or SPI flash only?
<f_> SPI isn't supported yet
<f_> so it's either from SD or eMMC
<CyReVolt> Okay so to come back to the goal: You did load something via WorldCup at some point, right?
<f_> yes, BL2+BL30+BL31+U-Boot
<CyReVolt> Re UART: I get CHK:22;CHK:1F; (first one with the header, latter without)
<f_> And that was only for writing to the lepotato eMMC
* f_ opens BL1 decomp in ghidra
<CyReVolt> Okay and when you ran that, did you have to have the header?
<f_> I just ran `./boot.py libretech-cc`
<f_> the images were already there
<f_> ah, the one getting loaded by BL1 has a header, indeed
<CyReVolt> soooo
<f_> CyReVolt: one question, what did you run to sign?
<CyReVolt> I didn't sign anything, just added the header
<f_> Manually?
<f_> or you used amlimage?
<CyReVolt> mkimage -T amlimage -n gxl -d blinky.bin blinky.aml
<f_> hmm
<CyReVolt> I figured when I give it a random text file, I also get CHK:1F;
<f_> 1F means can't find @AML IIRC
<CyReVolt> I suspect that the 22 means it parsed the header?
<f_> No
<CyReVolt> but errored somehow?
<f_> no idea
<CyReVolt> I get the 22 when I pass the blinky.aml that has the header
<CyReVolt> took that as a good first sign, something different at least
<f_> CHK:0 means success
<CyReVolt> right, makes sense
<f_> That's on VIM1 right?
<f_> can I have a quick peek at your header?
<f_> xxd blinky.aml | curl -F'text=<-' https://bin.vitali64.duckdns.org/
<f_> (that curl throws things at my pastebin service)
<CyReVolt> https://github.com/orangecms/aml_s905d3_blinky is my sophisticated blinky
<CyReVolt> this is now on the S905D3
<CyReVolt> oh wait...
<CyReVolt> that is not a GXL...?
<f_> no, it's sm1
<f_> so..s/gxl/sm1/ :)
<f_> And try again.
<CyReVolt> Boom! CHK:0
<f_> There you go!
<CyReVolt> no LED lighting up though
<CyReVolt> but that's maybe my fault lol
<CyReVolt> Does Amlogic start in 64-bit mode? IIRC correctly, sunxi aarch64 SoCs actually start in 32-bit mode ...
<f_> gxbb and gxl start in 64-bit mode
<f_> (although newer gxl bl2 are 32-bit)
<CyReVolt> so this is SM1..
<CyReVolt> I will try 32-bit
<f_> SM1 should start in 64-bit mode too
<f_> Kwiboo tested 64-bit SPL in SM1 and it ran something
<CyReVolt> yea no blinky with 32bit
<f_> Looks more like a code problem rather than a header problem
<Kwiboo> yeah, all socs seem to run at aarch64 mode, newer at EL3 and older one at EL1, newer bl2 for gxl seem to install exception vectors at aarch64 mode then it change to aarch32 mode, guessing to reduce code size
<f_> Guessing that too
<f_> Or they trying to workaround something
<f_> *them
<f_> GXBB and GXL run at EL1, newer SoCs e.g. G12 and SM1 run BL2 at EL3
<f_> Doesn't matter much for U-Boot SPL as on those older SoCs we restart execution at EL3 anyway
<Kwiboo> if I remember commit log corretly the change to aarch32 for gxl bl2 happended when new ddr code was added, could have been to support new ddr/lpddr init in same blob took too much space
<f_> Probably
<f_> Let me look that up
<CyReVolt> so all I do is a bit of MMIO
<f_> Kwiboo: which commit?
<Kwiboo> that commit changes to thumb
<f_> haha
<f_> commit 96c12dadec8284b501ce213bcde0e1c4651dde43 in the HK tree
<CyReVolt> Kwiboo: https://github.com/orangecms/aml_s905d3_blinky is what I try running
<f_> Kwiboo owns SM1 hardware unlike me :P
<f_> (but as mentionned above I'll collect some cottonwood boards from lvrp16 soon)
<Kwiboo> f_: https://gitlab.com/radxa_zero2/p-amlogic/firmware/bin/bl2/-/commit/c47afcc3f404407d768b2514723ba3da1a6790a2 <<-- mention that bl2-v3 can work with aarch64 and aarch32
<Kwiboo> CyReVolt: yeah, looks like you code could work, wonter if it runs too fast and you never see any blink because of that?
<CyReVolt> If it works, I should see the LED at half brightness or something - it's a loop after all
<CyReVolt> let me remove the turning off though, to verify
<CyReVolt> nope, no light :/
<f_> which board?
<f_> solitude?
<CyReVolt> ok I messed it up
<CyReVolt> I GOT LIGHT!
<CyReVolt> I fiddled too much and wrote the wrong values lol
<f_> lol
<f_> CyReVolt: amlimage only exists on my tree and Kwiboo's
<f_> So perhaps you should reflect that somewhere?
<CyReVolt> yea this is really just for you folks now to see what I tried
<CyReVolt> I will add a README etc at some point, just wanted to get a bit of an understanding for now
<f_> Sure
<CyReVolt> I'm watching Qubes OS Summit in parallel and tomorrow I'll be flying over to the US for OSFC. Didn't even intend to do more today, but you motivated me. :p
<f_> lol
<CyReVolt> Anyway, thank you so much!
<f_> Np!
<f_> Are you going to install a bouncer after all?
<f_> lol
<f_> (pretty unnecessary for this channel)
<CyReVolt> Nope, I won't... I had that, it was wonky, and tbh if it wasn't for this here, I would not want to be on IRC.
<CyReVolt> sorry ^^
<f_> sorry for what
<f_> A bouncer would be useless here as there are online logs already
<f_> and I myself use that.
<f_> I don't run a bouncer...yet
<CyReVolt> I meant that as in sorry for dismissing IRC ;)
<CyReVolt> I really appreciate the logs \o/
<f_> As a previous Matrix user, IRC is just better in many aspects.
<f_> e.g. sane clients, simple by design, etc
<f_> The IRC experience will be infinitely better when Libera.Chat transitions to using sable as their IRC daemon
<CyReVolt> The only thing I really want is an integrated, persistent log so I can scroll back. Having it in a different place is good enough though.
<f_> CyReVolt: Sable has that feature ;)
<f_> backlogs, I mean
<f_> That's why I'm excited for libera.chat to soon switch to using it
<CyReVolt> yes Hexchat as well, but either way, IRC requires a bouncer or other external log, since you miss things otherwise, like people replying in your absence
<f_> CyReVolt: I think you didn't understand what I just said
<f_> sable will be able to send logs to you, just like matrix
<f_> backlogs, when you're not connected
<f_> >Complete network state history allows persistent user presence. Users can remain online when their clients disconnect, and can have multiple client connections, potentially on different servers, to a single user session.
<CyReVolt> ah perfect
<f_> Sable is still experimental, but I'm excited.
<CyReVolt> Does Libera run that already? I would need a corresponding client then...
<f_> it doesn't....yet
<CyReVolt> oh wow, then I'm really looking forward to it
<f_> soju looks like a nice and easy to setup bouncer too
<CyReVolt> they are literally fixing the one key point that kept me out of IRC :D
<f_> nice
<CyReVolt> https://mastodon.social/@CyReVolt/111194596957100647 and then there was light
<CyReVolt> (video proof)
<CyReVolt> I wonder why the mask ROM loader exits my infinite loop after while, guess that's a watchdog
<f_> It's the watchdog indeed
<f_> but you can disable it fairly easily.
<CyReVolt> oh and I like soju
<CyReVolt> and makgeolli
* f_ boosts that toot.
<CyReVolt> woop woop 🥳
<f_> Gotta thank Kwiboo too for writing amlimage
<f_> Is your fedi account cross-posting to twitter?
<CyReVolt> oh woohoo Sable is written in Rust - perfect, another thing I can contribute to! :)
<f_> rust is rusty :D
<CyReVolt> I'm not cross-posting, just manually posting on both.
<f_> sure
<CyReVolt> Rust is easy and has workable tooling out of the box, that's all I'm ever after. ;)
<CyReVolt> And yea, big big kudos to Kwiboo! \o/
<f_> I don't know rust lol
<f_> Only Python, C, C++ (but I never publicly wrote anything in that language), some JS..
<CyReVolt> tysen tysen tack
<f_> posix shell, some bash
<f_> but yeah congrats!
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<CyReVolt> my other languages are JavaScript and Go :)
<CyReVolt> first was Pascal and OO Pascal / Delphi :D
<CyReVolt> a little PHP interlude, but not much has stuck haha
<CyReVolt> Anyway, thanks again, seeing the LEDs light up is such a satisfaction :D
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<f_> CyReVolt: Want to disable the watchdog?
<f_> this one line does exactly that
<CyReVolt> yea just gotta kick some bit :D
<CyReVolt> Thank you
<f_> Np
<f_> It's also in the Amlogic U-Boot sources in the watchdog_disable function
<CyReVolt> great, now I gotta figure out how to do that in asm or RiiR
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<CyReVolt> I know almost zero aarch64 assembly xD always fall for writing j instead of b because I'm used to RISC-V :D
<f_> lol
<CyReVolt> it's a different address on the S905D3
<CyReVolt> they are all FFxxxxxx
<f_> ah yes
<f_> Forgot about that
<f_> nice that I have almost every single public amlogic datasheet :D
<f_> neatly organised
<f_> #define P_WATCHDOG_CNTL (volatile unsigned int *)((0x3c34 << 2) + 0xffd00000)
<f_> *P_WATCHDOG_CNTL &= ~((1<<18)|(1<<25));
<f_> ^ CyReVolt
<f_> my bad
<f_> Still not very familiar with anything newer than gxl
<f_> ^ neat isn't it? (note: I don't use a macbook)
<CyReVolt> yup that does it, LEDs keep glowing
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<CyReVolt> I just got a drink and such, already had the S905D3 datasheet open and scrolled around the timer section, and then you had already found it :D
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<f_> :D
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