narmstrong changed the topic of #linux-amlogic to: Amlogic mainline kernel development discussion - our wiki http://linux-meson.com/ - ml linux-amlogic@lists.infradead.org - official channel moved from Freenode - publicly logged on https://libera.irclog.whitequark.org/linux-amlogic
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<lvrp16> Finally done conferences and can go home to get some work done.
<lvrp16> Go home and start bugging people to get more documentation.
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<f_> lvrp16: nice
<f_> Seeing as you're already preparing for V1.0, will I get V1.0 or V0.2 after all?
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<f_> Am very curious as to how BL2 handles DRAM firmware
<f_> (on g12b)
<narmstrong> Yeah there must be an entry point to each fw ?
<f_> I don't really care about that tbh
<f_> Mostly interested on aml_ddr.fw
<f_> I'm 50% sure it is *not* firmware to be loaded into DRAM
<f_> and rather something just like BL21
<f_> which they made perhaps because of size limits?
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<narmstrong> yea it's init code, no idea why they ship them separately since afterwards they glue them together
<f_> oh really?
* f_ checks amlogic-boot-fip scripts
<narmstrong> they're added in a weird header after the fip table
<narmstrong> man i wrote this code, looks good
<f_> Have no doubt your code is better than Amlogic's
<f_> Yeah that's good code
<f_> Could probably get loaded by BL2 tbh, which could be why that weird header is used
<narmstrong> i think my worse code is better than Amlogic's, even the one i wrote in my young times: https://github.com/starnux/spaceinv/blob/master/Source/SPACEINV.C and I assure you this one is ugly as hell
<f_> aha, french
<narmstrong> ok yeah I wrote this in Borland C++ in a DOS shell
<f_> Haha
<f_> understandable then, you didn't use vim
<Daanct12> EDIT.COM the best
<f_> Vim on DOS
* f_ uses Vim
<narmstrong> it was dark time for me, I wasn't really aware of linux
<f_> narmstrong: Vim does run on DOS though :P
<narmstrong> oh yeah I know
<f_> In the meantime MS releases MSDOS 2.x source code
<narmstrong> I was like John Snow, I didn't know anything and learned C with an old book on Borland C++ 4.5 for 80286
<narmstrong> anyway yeah, didn't you pass the ddrfw files to Ghidra ?
<f_> Not yet
<narmstrong> https://gitlab.com/superna9999/amlogic-u-boot-autotest/-/jobs/5338340011 <= my first U-Boot test run on lepotato in Gitlab CI :-)
<f_> Nice!
<f_> what is up with these commits though
<f_> fixup! fixup! fixup! fixup! fixup! fixup! fixup! fixup! fixup! fixup! fixup! fixup! fixup! Sync with u-boot Dockerfile
<narmstrong> a little --autosquash all it the will disappear
<f_> 17:50 <xdarklight> to all reverse engineering interested people here wanting to take a look at the DDR firmware blobs on G12A and newer SoCs: $ dd if=aml_ddr.fw bs=1 skip=96 | lz4 > foo.bin.dec
<f_> the gibberish at the start isn't a real problem for ghidra if that file wasn't compressed.
<f_> >The file aml_ddr.fw.dec seems to have nasted files in it.
<f_> *nested
<f_> Will go for a while..
<f_> (bouncer will stay connected though=
<f_> *)
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<narmstrong> for reference, this is how I'm running the u-boot pytest on lepotato over ssh from a gitlab ci job: https://gitlab.com/superna9999/amlogic-u-boot-autotest/-/merge_requests/3#note_1612357680
<narmstrong> and I switched to buildman to build the boards, 2m to build 44 boards ^^
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<mkorpershoek> super cool for buildman !
<narmstrong> bonus, you can see all the tests passed on the HW: https://gitlab.com/superna9999/amlogic-u-boot-autotest/-/pipelines/1043904547/test_report
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<f_> Super cool!
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<f_> Got it!
<f_> Fed aml_ddr.fw into ghidra and it's indeed aarch64 code.
<f_> At this point reversing g12 BL2 is useless.
<f_> It only seems to load that and run it..
<narmstrong> at first, but we should have them as source as some point, FTW !
<f_> but yeah they indeed moved everything there..
<f_> and indeed..they load it manually from BL2.
<f_> So they may have probably split it because of size limits.
<f_> but IIRC the size limit changed in g12?
<narmstrong> i don't think so, perhaps it was too limited to load more init codes
<f_> How limited?
<f_> When I say the size, I mean the maximum size the bootROM can load to SRAM
<f_> on gxbb/gxl it's maximum 48K with 44K usable.
<narmstrong> yeah they may have hit the limit with all the ddr variants
<f_> I think on g12 it's 0xf000?
<f_> OK back to gxl.
<f_> ^ SPL/BL2 register diffs.
<f_> Best viewed with less -R
<f_> (has colours)
<f_> ^ -U0 version
<f_> and we have many differences..
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<f_> Reversing DRAM made easier on g12
* f_ looks at Amlogic staffers lurking here.
<f_> Thanks!
* f_ back to gxl
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<f_> Yay
<f_> Wait done for PGSR0, currently 0x80000fff
<f_> ^ PGSR0 says success!
<f_> Should push now..
<f_> Still got some diffs (I guess)
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<f_> To clarify though, DRAM init still doesn't work..
<f_> But it's still progress!
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<f_> (currently waits for PCTL_STAT to return UPCTL_STAT_ACCESS which never happens..so further effort is needed)
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<f_> git push
<f_> Removed some files generated by make which ended up getting picked up by git for some reason.
<f_> (make distclean)
<f_> Did great progress today.
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