11:49 <f_> How similar is AXG to GXL?

11:51 <f_> lvrp16: oh BTW where's cottonwood acs?

11:51 <f_> Oh wait I think I found it.

11:52 <f_> and it's..different from the older SoC ACS..

11:56 <f_> Oh no what have they done. __bl2_reg..

11:57 <f_> No ddrt struct anymore?

12:04 <f_> aha!

12:04 <f_> AXG PUB register offsets seems to be the same as on gxl

12:48 <f_> Different issue. Finally some progress.

12:49 <f_> gxbb BL2 seems the wait for DLL lock

12:49 <f_> gxl BL2 doesn't(?)

14:53 <lvrp16> f_: it should be in the same repos

14:53 <f_> Yeah I found it.

14:54 <lvrp16> Except there is additional lpddr4 bringup stuff.

14:54 <f_> Quickly looked at git log

14:54 <f_> seems like librecomputer boards are getting a little popular among postmarketOS maintainers :P

14:55 <f_> One of them ported pmOS to solitude

14:55 <lvrp16> Yes I need to turn off the NPU by default.

14:55 <f_> he doesn't have alta though it seems

14:55 <lvrp16> Currently busy working on the camera bits.

14:56 <f_> Nice. Cottonwood-powered smart camera?

14:56 <lvrp16> If any of the maintainers need boards, just have them ping me.

14:56 <lvrp16> We will be done with the V1 rev next week.

14:57 <f_> V1 is just V0.2 with another switch I guess?

14:57 <lvrp16> Yes

14:57 <lvrp16> But small changes require large layout changes.

14:58 <f_> Ah.

14:58 <f_> Which layout changes?

15:12 <lvrp16> Adding a switch meaning rerouting a bunch of lines.

15:15 <f_> ah sure

15:15 <f_> Of course

15:15 <f_> Did I ever said that SPI/MMC switch was genius?

15:15 <f_> I could have BL2 and al in SPI and have SPL in MMC

15:16 <f_> SPL doesn't work? flick the switch and run ums

15:16 <f_> also I was a little confused as to if you can communicate with the bootROM on the USB-C port

15:30 <f_> "did I ever say.."

15:35 <f_> AXG seems similar to gxl when it comes to registers

15:36 <f_> Sure, the base address is different, but apart from that it's pretty similar.

15:36 <f_> https://github.com/libre-computer-project/libretech-amlogic-boot.git bl33/arch/arm/include/asm/arch-axg/regs.h

15:37 <f_> has a whole bunch of registers, and if you look at the offsets of the DRAM-related ones and compare with the S905X datasheet..

15:39 <lvrp16> You can communicate with the BootROM over USB C

15:42 <f_> Ohh nice.

15:56 <f_> haha we're just getting closer!!

15:56 <f_> Didn't think I'd get this far in that less time!

15:56 <f_> >Waiting for PGSR0, currently 0x808000ff

15:56 <f_> But it seems like an error occured somewhere?

15:58 <f_> arch/arm/mach-uniphier/dram/ddrmphy-regs.h:#define MPHY_PGSR0_WLAERR BIT(23) /* Write Leveling Adj Error */

15:59 <f_> Let's compare ghidra's decomp with my code.

17:02 <f_> We're almost there!

17:03 <f_> 1/2 seems to succeed according to PGSR0!

17:15 <f_> Different error this time:

17:15 <f_> arch/arm/mach-uniphier/dram/ddrmphy-regs.h:#define MPHY_PGSR0_QSGERR BIT(22) /* DQS Gate Training Error */

17:15 <f_> But I know why.

17:54 <f_> I'll continue tomorrow.

17:54 <f_> For now, cya!

17:54 <f_> Made some progress for sure.

17:54 <f_> U-Boot SPL on lepotato is nigh!

17:55 <f_> :D

19:35 <josch> hi, i'm building u-boot for the MNT Reform with the Banana Pi CM4 using https://github.com/libreelec/amlogic-boot-fip. I noticed that with SOURCE_DATE_EPOCH set and even when using faketime, the amlogic-boot-fip machinery produced different output every time even though its input remains identical.

19:35 <josch> Is there a way to produce a reproducible u-boot image for that platform in the reproducible-builds sense?

19:47 <minute> ah, f_ left like 1.5h ago