narmstrong changed the topic of #linux-amlogic to: Amlogic mainline kernel development discussion - our wiki http://linux-meson.com/ - ml linux-amlogic@lists.infradead.org - official channel moved from Freenode - publicly logged on https://libera.irclog.whitequark.org/linux-amlogic
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<alexeymrvz> Hi narmstrong! Today you merge 1/3 patches here: https://lore.kernel.org/all/169623006266.3465675.18104807906024050196.b4-ty@linaro.org/. But who should merge the remaining two?
<alexeymrvz> At the moment DTS is incorrect, without these two patches
<narmstrong> minute: alexeymrvz herbert xu should
<narmstrong> minute: sorry wrong person
<narmstrong> alexeymrvz: herbert xu should
<narmstrong> alexeymrvz: the bindings was reviewed to it's ok for me to merge the dt part
<alexeymrvz> Ok, thank you, should I ping Herbert?
<narmstrong> alexeymrvz: I expect him to merge the patches in the next 2 weeks
<alexeymrvz> good
<narmstrong> I think it's too early
<alexeymrvz> OK, will wait :)
<alexeymrvz> thanks
<kbingham> has anyone already got started with the libre.computer A311D board here?
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<narmstrong> I’m
<narmstrong> Waiting for the DT patches on the mailing lists to test them!
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<lvrp16> I had to catch up on some sleep but should provide some stuff in a few hours
<kbingham> lvrp16, sleep is /always/ acceptable ;-)
<lvrp16> I didn't even get any boards myself so I borrowed some yesterday :D
<kbingham> It's rarely possible ... but always acceptable ;-)
<lvrp16> haha
<lvrp16> i'll share with you guys a bit, with u-boot coming out today, I'll rebase
<kbingham> awesome. Well my board is ready to be in the farm - so I can work on it whenever.
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<narmstrong> the patches are on the list, time to play :-)
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<f_> narmstrong, lvrp16: nice!
<f_> Should I probably wait for V1.0?
<lvrp16> V1.0 is the same as V0.2
<lvrp16> maybe add a switch but no other changes
<f_> Sure
<f_> So I'll wait until I get SPL working on gxl first :)
<f_> Or receive it and never use it until SPL comes on GXL
<lvrp16> nice 2023.10 got tagged too :D
<lvrp16> time to rebase everything
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<f_> Should probably rebase my tree too at some point
<f_> Oh by the way for those who don't keep refreshing that git logs page on my website
<f_> I forgot to say that yesterday, but we now have DRAM PLL init working on GXL
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<lvrp16> f_: that was quick, SPL works on GXBB already?
<f_> GXL you meant?
<f_> Not yet.
<f_> Still have to port..the rest of the DRAM code
<lvrp16> GXBB, not GXL
<f_> SPL boots on GXBB
<f_> needs a few tries to send the SCP firmware but it boots
* f_ powers his box on.
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<f_> and that's why it takes so long to bot
<f_> *boot
<f_> ^ has steps on how to compile
<lvrp16> niceee
* f_ notices that his box just booted
<kbingham> f_, Are you working on the bootloaders?
<f_> kbingham: Working on reversing Amlogic's BL2 blob
<kbingham> I see ;-)
<f_> and porting U-Boot SPL
<f_> Am currently working on the gxl boards lvrp16 donated
<f_> (gxl, not the new cottonwood boards)
<lvrp16> they will be coming to you as soon as China is off holiday next week
<f_> lvrp16: Thanks a whole lot!
<f_> As said before, take your time
<f_> Doubt SPL will be booting on gxl next week either :P
<f_> lvrp16: but yeah thanks!
<f_> lvrp16: both S905D3 and A311D?
<lvrp16> f_: yes, both boards. we let people have a free for all at the end of the conference
<lvrp16> so I didn't even get boards :D
<f_> :D
<f_> perhaps 2/3 eMMC modules too :D
<lvrp16> but kbingham gave good feedback and I had an idea for a change before V1
<lvrp16> f_: sounds good
<f_> 3rd one because of lafrite
<f_> I should've requested 2 eMMC modules back then lol
<f_> Also I'm worried at breaking the fragile eMMC connector
<f_> (which is also why I'm using a Pi2 case with my lepotato)
<lvrp16> the connector on the board is pretty robust, the one on the emmc module is not
<f_> Yeah the one on the eMMC module is the one I'm worried of breaking
<f_> and if I keep moving that module between lepotato and lafrite I doubt that connector would last :P
<lvrp16> no worries, they're $5 to make
<f_> lvrp16: sure, thanks!
<lvrp16> I'll send you a bunch
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<f_> 16/32/64 GB should be fine
<f_> (either one is fine, I mean)
<f_> lvrp16: Thanks!
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<kbingham> lvrp16, Is the board an A311d1 or a311d2 ?
<f_> A311D
<f_> D1 doesn't exist
<f_> and D2 has close to no mainline support
<lvrp16> kbingham: A311D, not A311D2
<kbingham> Ok
<lvrp16> A311D2 has 64-bit DDR but still A73, curious design
<f_> hmm some changes in DRAM
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<f_> win 18
<f_> oops.
<f_> hmm I wonder what 0xd900a800 is...
<f_> lots of references to it in the code, but this isn't actually the acs
<f_> (the acs is to be found between 0xd900a000 and 0xd900a340)
<f_> haha they forgot to clean up DDR_PIR
<f_> and PGSR_CHECK
<f_> *PGSR0_CHECK
<f_> lol
<f_> as well as function prototypes XD
<f_> https://github.com/libre-computer-project/libretech-amlogic-boot arch/arm/include/asm/arch-gxl/ddr.h !
<f_> Very, very funny.
<f_> >unsigned int ddr_init(void);
<f_> >#define DDR_PGSR0_CHECK()
<f_> >#define UPCTL_CMD_INIT (0)
<f_> ^ narmstrong
<f_> Hey, they have the same thing on g12!!! :P
<f_> quick `git grep` shows:
<f_> arch/arm/include/asm/arch-g12a/ddr.h:unsigned int ddr_init(void);
<f_> how funny is this? They make bl2 proprietary and forget to remove leftovers XD
<f_> That's what I call professional obfuscation!
<f_> their code is messier than on GXBB; pre_init is redefining timing values!
<f_> I'll push now and disconnect
<f_> (push the new decomp..this one has BL21+ACS bundled)
<f_> (p212 BL21 and lepotato ACS...or vice-versa..not sure)
<f_> \o
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<lvrp16> Copy paste bolt on. Time is of the essence.
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