sorear changed the topic of #riscv to: RISC-V instruction set architecture | https://riscv.org | Logs: https://libera.irclog.whitequark.org/riscv | Matrix: #riscv:catircservices.org
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<wmat> If anyone has recently been effected by a layoff, is local to the Bay Area and is interested in attending the RISC-V Summit you can apply for a Registration Scholarship here https://linuxfoundation.surveymonkey.com/r/PX9SKBV
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<muurkha> wmat: thanks, that's awesome news
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<drewfustini> I'm having trouble getting DMA working on a RISC-V system where the DDR starts at 0x8000000000 (512 GB offset). I don't see examples of other systems where the DDR starts so high so I'm wondering if it might be a problem. Anyone run into something like this before?
<drewfustini> [ 0.000000] Zone ranges:
<drewfustini> [ 0.000000] DMA32 empty
<drewfustini> [ 0.000000] Normal [mem 0x0000008000000000-0x00000083ffffffff]
<drewfustini> ultimately it looks like something goes wrong in __alloc_pages()
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<heat> probably disable CONFIG_ZONE_DMA32 ?
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