09:17 <Felkin> Yo, I've a question in regards to supported boards: I'm starting a large research project on the Alveo U55C boards and am considering whether I could set up my entire flow with LiteX or if adding the support for this platform might be a bit too much of a pain. While U250 and U280 are currently supported, the U55C is under the whole Vitis flow and

09:17 <Felkin> I'm not sure if Xilinx didn't go out of their way to make it 'very' hard to do anything with this board outside of that flow. Any thoughts on this? At the very least, there's clearly push from them to use the XRT to connect to the platform so LiteX needs to be able to get the xilinx tooling to generate .xo's for RTL kernels and .xclbins for the

09:17 <Felkin> final bitstreams. Not sure if the tooling wasn't already providing support for this with the U250s

10:35 <Guest58> Does someone know how to deal with floating-point numbers in C files in litex? if I tried printing a float number it give *float* as a result or sometimes ( undefined reference to `__extendsfdf2' ) while building

10:37 <Guest58> Can some one help me with this ?

16:26 <_florent_> cr1901: sure, this indeed make things very visual. We could integrate it in the Wiki if alanvgreen is fine with it

16:45 <_florent_> Felkin: It seems some open-source project are using it with Vivado/.tcl scripts (ex https://github.com/slaclab/axi-pcie-core/tree/main/hardware/XilinxAlveoU55c), so LiteX support should be very similar to other Alveo boards