_florent_ changed the topic of #litex to: LiteX FPGA SoC builder and Cores / Github : https://github.com/enjoy-digital, https://github.com/litex-hub / Logs: https://libera.irclog.whitequark.org/litex
tpb has quit [Remote host closed the connection]
tpb has joined #litex
<jevinskie[m]> Weird, I keep getting simulated etherbone timeouts where after a burst of r/w one of the reads never responds with a packet. This is with iverilog and Questa, a similar thing happened when I modified the Ethernet module to work with macOS where libevent had to block on tap reads…
<jevinskie[m]> I switched over to uartbone over serial2tcp and that seems to fix or paper over the issue. Just required a small superclass of CommUART to make a socket connection
<jevinskie[m]> Anybody else see suspicious litescope timeouts?
<jevinskie[m]> I wonder if the Ethernet simulation is too slow while the uart PHY is much more lightweight?
Degi_ has joined #litex
Degi has quit [Ping timeout: 244 seconds]
Degi_ is now known as Degi
cr1901 has quit [Read error: Connection reset by peer]
cr1901 has joined #litex
<cr1901> trabucayre: Sorry, I'm not going to get to testing your gist tonight. I'll do it when I wake up tomorrow
TMM_ has quit [Quit: https://quassel-irc.org - Chat comfortably. Anywhere.]
TMM_ has joined #litex
<trabucayre> cr1901: no problems
acathla has quit [*.net *.split]
novenary has quit [*.net *.split]
genpaku has quit [*.net *.split]
gruetzkopf has quit [*.net *.split]
genpaku has joined #litex
novenary has joined #litex
acathla has joined #litex
gruetzkopf has joined #litex
kbeckmann1 is now known as kbeckmann
kbeckmann has quit [Quit: WeeChat 3.4.1]
kbeckmann has joined #litex
MoeIcenowy has quit [Ping timeout: 240 seconds]
MoeIcenowy has joined #litex
linear_cannon has joined #litex
<trabucayre> answered :)
<cr1901> trabucayre: I got an LA trace for you
<cr1901> Wait... I might've screwed up the duration, hold on
<trabucayre> it's maybe not the right location to talk about that :)
<cr1901> Is there an openFPGALoader IRC channel?
<cr1901> trabucayre: If no IRC channel, you may wish to idle in ##openfpga. openFPGALoader is on topic there by being an "Open source tool for FPGAs/JTAG"
TMM_ has quit [Quit: https://quassel-irc.org - Chat comfortably. Anywhere.]
TMM_ has joined #litex
<trabucayre> I have to create one yep