_florent_ changed the topic of #litex to: LiteX FPGA SoC builder and Cores / Github : https://github.com/enjoy-digital, https://github.com/litex-hub / Logs: https://libera.irclog.whitequark.org/litex
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<ilia__s> don't know if this is recommended, but I'm using https://github.com/riscv-collab/riscv-gnu-toolchain/releases and never had problems
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<mc6808_> _florent_: I tried reverting liteeth without success but didn't get much time on this, back to it next week
<mc6808_> _florent_: I'll also test xip on xyloni, I started integrating this but got side tracked setting up the pll then had meetings...
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<mc6808_> One other thing I've been doing is integratinga can bus IP core into litex from here https://canbus.pages.fel.cvut.cz/
<tpb> Title: CTU FEE CAN-bus Projects Pages (at canbus.pages.fel.cvut.cz)
<mc6808_> I have the Linux driver integrated into Linux on litex, just need to actually get the can core to actually respond on wishbone. Integrating vhdl with yosys was an entertaining exercise and I'm not sure i have it correct yet
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