_florent_ changed the topic of #litex to: LiteX FPGA SoC builder and Cores / Github : https://github.com/enjoy-digital, https://github.com/litex-hub / Logs: https://libera.irclog.whitequark.org/litex
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<zyp> _florent_, submitted #942 -- with variables.mak already being dynamically generated, I found it easier to just make use of that, than to add more generation
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<jevinskie[m]> I have a need to capture a ~15 mbps synchronous serial stream (just sclk and cipo) and was hoping I could do so with my arty and something like 1-to-8 serial demux > litex stream > udp packet stream. Does that sound about right?
<jevinskie[m]> I see the stream2udp class is used in the noscope project and litesd benchmark but I’m still unsure how to proceed with the serial demux to stream and how do do so without requiring involvement from a soft cpu
<zyp> _florent_, I'm working on upstreaming other stuff needed for orbtrace as well so I just submitted another couple of PRs, I'd appreciate it if you could also have a look at litespi#48, litespi#50 and litehyperbus#5 when you have time
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