whitequark changed the topic of #yosys to: Yosys Open SYnthesis Suite: https://github.com/YosysHQ/yosys/ | Channel logs: https://libera.irclog.whitequark.org/yosys/ | Bridged to #yosys:matrix.org
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<ikskuh> heya o/
<ikskuh> how good is the support for the lattice CrossLink-NX devices right now?
<lofty> ikskuh: google tried using it for a thing, but then cancelled the project it was for (because google); otherwise, it's not been used much in the real world
<ikskuh> hmm
<ikskuh> i want to do some CVBS capturing and forward the picture as "raw" as possible to a rpi like device
<ikskuh> current plan was using mipi and crosslink-nx has mipi support
<lofty> Could you not achieve it with an ECP5?
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<ikskuh> probably, yes
<ikskuh> but i was kinda oogling with the QFN package :D
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<ikskuh> but i'm still just exploring the idea space. i found a project that basically does everything perfectly already
<tpb> Title: Composite Video (CVBS) to MIPI CSI-2 Bridge · Antmicro Hardware Portal (at openhardware.antmicro.com)
<ikskuh> but i found another chip that supports up to 10 inputs which is really tempting
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<ikskuh> is there a community where i can ask for help with a FPGA design? i guess this channel is mainly for yosys development, not hardware design :)
<lofty> ##fpga maybe
<ikskuh> let's see :)
<jn> ikskuh: and also HDL-specific channels like #amaranth-lang
<ikskuh> not hdl-specific right now :)
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