sorear changed the topic of #riscv to: RISC-V instruction set architecture | https://riscv.org | Logs: https://libera.irclog.whitequark.org/riscv
<solrize> i know that dv25 video needs precise timing
<solrize> i guess you could do an rs232 uart in that 32 bytes
<solrize> idk maybe it is tricky
<muurkha> I think it would be doable
<muurkha> it's not 32 bytes, it's 32 VLIW instructions
<muurkha> the crappy keyboard firmware probably scans the keyboard matrix at like 50Hz or 100Hz
<muurkha> https://danluu.com/keyboard-latency/ says most USB keyboards scan at 125Hz
<solrize> 16 bits is a very long word? ha
<muurkha> well, maybe the acronym is a bit of a misnomer in this case ;)
<solrize> :)
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<muurkha> (transmit is trivial, receive is the hard part because you have to do CDR)
<solrize> dk what cdr is but yeah receive is more complicated
<muurkha> clock and data recovery
<muurkha> their minimal four-instruction version just samples each bit once, at the point that it thinks is the middle of the bit based on the start-bit edge
<solrize> looks like 9 instructions starting at line 50 but ok
<muurkha> then they have a 10-instruction version designed to handle BREAK and framing errors
<solrize> i guess that is what you usually do
<solrize> stuff like parity can be done in the main cpu
<solrize> with a lookup
<muurkha> oh, I guess you're right that it's only 9
<muurkha> yeah but ideally you'd like to, like, pay attention to the timing of the transitions, so that a little noise on the leading edge of the start bit doesn't result in bit errors throughout the whole byte
<solrize> are there risc v cores with determinitic timing like the beaglebone pru? so no processor pipeline i guess
<solrize> hmm ic
<muurkha> and maybe sample more than once to figure out whether a bit interval is mostly 1 or mostly 0
<solrize> yeah
<solrize> or as a more extreme example, maybe a convolutional code based on adc readings
<muurkha> yeah
<muurkha> pipelines can be deterministic, usually are
<muurkha> caches are the problematic part
<solrize> hm ok. yeah bb pru has no cache, dk about pipeline
<solrize> for a spread spectrum receiver you want an autocorrelator maybe a bunch of pios in parallel could do that
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<muurkha> this notebook illustrates a CDR algorithm I got from a Markus Kuhn paper which is able to handle quite a bit of noise: https://nbviewer.org/url/canonical.org/~kragen/sw/dev3/clock-and-data-recovery.ipynb
<muurkha> interesting, I didn't know spread-spectrum receivers used autocorrelation. you mean to take advantage of multipath?
<solrize> just to synchronize with the bit stream
<solrize> multipath hmm i hadn't thought of that
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<muurkha> how does autocorrelation help you synchronize with a spread-spectrum bit stream?
<muurkha> do you mean, like, to correct for doppler from a source moving at an unknown velocity, or to correct for clock speed error, or something?
<muurkha> in this CDR notebook I used lots of convolutions but no autocorrelation (because I assumed the receiver knew the bit rate perfectly, just not the phase, and also there was an extra 10dB of noise which the receiver was able to handle because it sampled each bit 104 times)
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<muurkha> solrize: https://people.ece.cornell.edu/land/courses/ece4760/RP2040/index_rp2040_MBED.html has a kind of nice survey of pioasm applications on it: blink, unipolar stepper driver, input event time capture, and NTSC output. people have also done WS2812, CAN, and RS-232 as mentioned above
<solrize> muurkha, autocorrelation because of tiny differences in rate and offset between tx and rx clocks
<muurkha> I'd think that the whole idea of the spreading code is to make the autocorrelation function of the original raw signal extremely small at all offsets other than 0, like an LFSR or Gold code
<muurkha> but I don't really understand spread spectrum at all
<solrize> let's say i have a bit stream to send at 1 mhz. so i xor it with a 10 mhz pseudorandom sequence. to recover the signal you xor the received stream with the same pseudorandom sequence. basically i start sending bits at 10 mhz starting at 0000 utc. a few hours later you want to start listening, so you use your clock to start your prng going at the right place. but if our clocks are a microsecond apart or one of them is 0.001ppm fast, there can be a big o
<solrize> ffset and you have to search around (autocorrelated). that is an extreme example since there will usually be a short code (minutes) overlaid on the long code but you do need to search and adjust
<muurkha> so how does the ACF help you search?
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<solrize> you xor the pseudorandom sequence with the incoming signal at a lot of small shifts in parallel and see where you get a correlation. there is something else needed to adjust for speed differences but i guess the AC window is small enough that you can handle that separately
<solrize> i have never implemented it, only read up on it a little
<solrize> i've had the idea of using a pico as an infrared communicator
<solrize> i guess using GPS as a time base could fix some sync probs
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<pabs3> muurkha: Longan are better than lychees :)
<dh`> heresy
* pabs3 ponders rambutan
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<dh`> durian!
<pabs3> mmm jackfruit
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<prabhakarlad> conchuod: what is the status of your kconfig.socs cleanup? (I didnt see the patches in Palmer's tree).
<prabhakarlad> I plan to send a v5 should I rebase on top of your patches?
<conchuod> Nah, just sent it on top of for-next
<conchuod> I sent a small bit of it as non RFC that I need to remind Greg about
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<prabhakarlad> thanks.
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<muurkha> pabs3: longan and jackfruit are indeed amazing. I haven't tried rambutan
<muurkha> solrize: you mean that if your signal after despreading has lots of ACF peaks it didn't have before, then you probably have the right timing?
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<muurkha> dh`: haven't had the pleasure of durian
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<dh`> I have yet to get hold of fresh ones but I have run across some things like durian-filled cookies, and they're great
<dh`> it's sort of weird because they do also have a foul smell attached, but that's not unprecedented either (e.g. stinky tofu)
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<rneese> ok guys what boards are you all currently testing /using ?
<la_mettrie> jh7100
<conchuod> I've kinda got a bit of everything
<anotherNightmare> qemu virt
<conchuod> (or more accurately, most of what's linux capable)
<rneese> la_mettrie what board
<rneese> you usinf starfive or beaglev
<la_mettrie> starfive
<rneese> have you updated it for uefi support ?
<rneese> I woul dlike to get your feeback on our imgs
<rneese> also we are trying to get a unmatched board for dev to get support into the builder
<rneese> we have jammy and sid imgs
<rneese> but we need feed back on them
<rneese> currently we have d1 and jh7100 beaglev / starfive support
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<conchuod> who is "we"
<solrize> muurkha, i don't know the lingo that well but i think that is the basic idea, the ACF peaks when the timing is right. maybe there is also a PLL to get the speeds sync'd
<la_mettrie> rneese: no
<solrize> rneese, i don't feel real excited by the idea of getting a low performance linux board just to be risc-v. i might get an esp32c3 or something like that
<rneese> right now its still under dev abd our temo project name is RISCVbian . as it was based on armbian when we atarted it but the head of the project said he did not want riscv in the project so wer ported our branch
<solrize> rneese, is this connected with rpi foundation?
<rneese> no
<solrize> k
<solrize> is armbian connected with rpi and/or arm?
<rneese> Armbian is Armhf/Arm64/
<rneese> as it stands but we ported our branch and it is riscv only
<rneese> we pulled all the arm stuff out for the most part and are working on it more to make shure
<mps> rneese: we (alpine linux team) got 4 visionfive boards to 'port' alpine and test it. but I have feeling these boards are abandoned and I didn't worked much on it. just tested different peripherals on GPIO header
<rneese> la_mettrie https://disk.yandex.ru/d/da8qJ8wyE1hhcQ/StatFive/UPDATE_UBOOT/20220701 if you get this file and put it on a blank sd and boot your starfive you will get uefi support
<conchuod> theyre not even making visionfives anymore are they?
<rneese> and we have efi and uefi imgs efi of sid uefi for jammy
<rneese> sid is still missing pkgs
<rneese> yes we are abotu to have v2
<mps> rneese: doesn't new u-boot already have efi?
<conchuod> "new" being relative, it's been in for a bit
<rneese> its in but not onfigured we configure it with this update
<rneese> and yes the v1 is still out there onsale on sites
<rneese> this adds uefi
<rneese> into the mix
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<mps> as of u-boot 2022.07 there is uefi in it
<rneese> but you can grab the sid img we have and test . its efi vs uefi
<rneese> not configured
<rneese> on the older visinfive v1 boards
<rneese> it might have the code but not configured in the uEnv
<rneese> you have to update the uEnv to get the support
<rneese> it shold be defualt on the v2 boards
<conchuod> I wonder when the V2s will be delivered.
<rneese> thoughs who helpf fund get theirs starting in Nov
<rneese> if you get the board from ameridroid or other specific models ship in Dec and Jan of 223
<rneese> 2022
<rneese> 2023
<rneese> cant type with broke fings
<rneese> has a list of where to buy
<rneese> we also have a firmware update for beaglev users to make them = to visionfive v1 and boot the same os images
<rneese> so any beaglev users wanting to update let me know
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<solrize> anyone got an openssl benchmark? rsa2048 specifically
<rneese> I have about finished a clone of the pc600 case for the visionfive v1/v2 as it as simple as swapping the back plate
<rneese> i am making a plug board to support usb-c to barrel plug option
<rneese> to go in the case
<rneese> when done I will post
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<conchuod> i printed myself something awful for my vision5
<conchuod> i need to get something better
<rneese> link to what u printed
<conchuod> I never posted it anywhere, I just did it to mostly learn how my printer works
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<muurkha> solrize: I wonder if you might be confusing autocorrelation with cross-correlation
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<conchuod> s/printer/freecad
<conchuod> I think the visionfive one was the first one I did so its pretty bad
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<solrize> muurkha, i guess that is possible
<muurkha> solrize: did you read my CDR notebook? you might enjoy it if this is the kind of thing you're into
<solrize> will look re cdr
<solrize> ethernet phy (8 of 10 coding) could in principle be another pio thing, at 100 mbit
<muurkha> what would you do if you got an illegal code? adjust an analog comparator threshold? I'd think an RC filter would do a better job of that
<muurkha> I mean it's not like CAN or I²C where you signal an error in a bit-time at the end of the word to request retransmission
<muurkha> again, the strength of RP2040 pio is low latency and precise timing rather than high computational throughput
<muurkha> (as I understand it)
<solrize> it could, you know, do both instead
<muurkha> both signal an error and adjust a threshold? but Ethernet doesn't provide it any way to signal an error, does it?
<solrize> no i mean have precise timing and compute