sorear changed the topic of #riscv to: RISC-V instruction set architecture | https://riscv.org | Logs: https://libera.irclog.whitequark.org/riscv
<somlo> jrtc27, palmer: thanks, that's what I was worried about... But good to know. (for context, I suspect the litex uart linux driver might have a bug, and wanted to bypass it to see if I get the same sorts of crashes without it
<palmer> somlo: that's exactly the sort of thing the SBI console is for ;)
<somlo> now I can move on to plan B (add irq support to the litex uart driver, see if things improve, or I might spot a (the?) bug in the process of doing that :D
<somlo> palmer: the kernel oops I'm getting only happens at the end of booting Fedora on my LiteX + rocket-chip "rig". So keeping as many things unchanged as possible in the entire Rube Goldberg machine is somewhat important, or else I can't tell whether a change I'm making actually fixes anything :D
<palmer> makes sense, at least for getting the first bit running it's best to contain the chaos
<palmer> somlo: that one's likely to be a headache, there's a bunch of debugging stuff in the kernel you might want to flip on
<palmer> (CONFIG_PROVE_LOCKING comes to mind)
<somlo> I'll first have to figure out how to get fedora working in qemu, so I can build a "oroper" kernel and initrd that's "the same except for the additional debug stuff flipped on"
<somlo> they've been ignoring qemu in favor of a bunch of "real" hardware boards, recently :)
<somlo> it's a bit of a recursive project, as it turns out :D :D
<somlo> *proper
<somlo> thanks for the CONFIG_PROVE_LOCKING suggestion, I'll annoy davidlt in #fedora now :)
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<donFernando> Does risc-v sign extend other ops than loads and stores?
<donFernando> Do immediate values, for i-type instructions, also get sign extended?
<dh`> yes
<dh`> on mips some instructions treat the immediate field as unsigned; on riscv they're all signed
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<donFernando> ok so 0xAA would get extended then to 0xFFFFFFAA?
<donFernando> as an immediate
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<donFernando> So what is the takeaway there? if I want to use something like xori I need to specify the full 12 bits?
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<donFernando> I guess I don't understand. If I run addi x2,x0,2 then I get 2 in the register x2
<donFernando> So that doesn't get sign extended.
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<jrtc27> sign-extended from 12 bits
<jrtc27> 0xAA is 0x0AA as a 12-bit value
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<donFernando> ah, ok. that clears it up. thanks so much jrtc27
<donFernando> thanks dh`
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<bjdooks> palmer: not sure if I have a lot of time to chase this one, I'm backlogged on a number of other issues
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<palmer> bjdooks: no worries, it's your stuff that's broken so it's no big deal to me ;)
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<conchuod> palmer: meh, still having issues with this extension detection crap - gone too far in the opposite direction & it's not detecting support when it should! Clearly I'm using that cc-option macro wrong..
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<conchuod> I wonder is it the comma in "-Wa,-march"
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<conchuod> But I am not sure how to use $(comma) in a Kconfig file
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<conchuod> nvm, was being being dumb as per & $(comma) does work as expected in Kconfig
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<conchuod> palmer: Not sure how to actually detect support correctly other than something ugly like this: https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/commit/?h=riscv-fix_zicbom_support_detection
<conchuod> (That doesn't work but it's all I'm doing for tonight...)
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<bjdooks> palmer: probably going to take a while to look at again, going to need some debian vms and see if I can do a rewind of the current testing state back to a few weeks ago
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