sorear changed the topic of #riscv to: RISC-V instruction set architecture | https://riscv.org | Logs: https://libera.irclog.whitequark.org/riscv
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<atishp[m][m]> conchuod: More details on the kasan issue
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<conchuod> @atishp[m][m] I see Qinglin has sent a potential fix already :)
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