sorear changed the topic of #riscv to: RISC-V instruction set architecture | https://riscv.org | Logs: https://libera.irclog.whitequark.org/riscv
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<jim-wilson[m]> Intel Innovation conference had a demo of the SiFive Horse Creek chip. Looking for more info, I found a video that talks a bit about it. The RISC-V part starts at 19:10. Doesn't give details, but says Horse Creek part has taped out and a board with PCIe is expected by end of year. https://www.intel.com/content/www/us/en/events/on365/ifs-open-chiplet-platform.html
<geist> oooh neat
<q66> does that mean i won't have to build my distro in qemu-user anymore
<courmisch> no vector, meh
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