sorear changed the topic of #riscv to: RISC-V instruction set architecture | https://riscv.org | Logs: https://libera.irclog.whitequark.org/riscv
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<meowray> what does Zcmt do? the spec (https://github.com/riscv/riscv-code-size-reduction/releases/tag/v1.0.0-RC5.6) seems super unclear
<meowray> grammar mistake in "cm.jt and cm.jalt encodings index the table" ?
<HdkR> Is this a compressed table jump similar to THUMB?
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<meowray> HdkR: it's a table jump (like GOT indirection). i do not know whether THUMB has something similar
<HdkR> Yea, Thumb has a cool jump table instruction as well, nice for switch statements
<meowray> for cm.jt, it looks like they want to count frequencies of target addresses, fill a table with the 256 most frequent entries, and set the CSR register JVT to the start address of the table
<meowray> in reality JVT seems initialized just once. can't this indirect jump hurt performance?
<HdkR> ah, setting a CSR rather than a GPR for the table base. finnicky
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<meowray> how likely can the table jump be optimized in the hardware? otherwise doesn't take a great hit to instruction prefetch,etc?
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<muurkha> counting frequencies of target addresses sounds like the kind of thing you'd want for JIT-compilation of dynamic languages
<muurkha> and that kind of passive trace information collection seems like the kind of thing that is a lot cheaper to do in hardware than in software (if your limit is speed and not power consumption, anyway)
<muurkha> but if the table base is set with a CSR it sounds like it would be more useful for GOT kinds of things than megamorphic callsites for JIT compilation
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<jrtc27> meowray: it's targeting the embedded space where code size >> performance
<jrtc27> AFAIK
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<muurkha> jrtc27: but there all it's saving you is a little bit of millicode, right?
<jrtc27> well, your millicode might be out of range of a compressed jump
<jrtc27> almost certainly is, otherwise you could just use that instead of the indirect jump
<muurkha> hm, I hadn't thought of that
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