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<rneese>
morning
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<muurkha>
solrize: hey, that's exciting!
<muurkha>
solrize: it says it's "RV32EC", which is a combination I haven't seen before: the "E" variant with 16 32-bit registers instead of 32, plus "C" for compressed instructions
<muurkha>
it has what appears to be a pretty extensive set of datasheets but my Chinese leaves something to be desired so I'm not sure how much I can get out of them
<muurkha>
but from the English bits looks like it has 16K of Flash, 2K of SRAM, 1920 bytes of bootloader (maybe part of the Flash), 64 bytes of EEPROM, an SPI bus (with DMA), an I²C bus, an ADC with ten input channels (two of them connected to opamps whose inputs and outputs are brought out), a couple of timer/counter units each with 4 PWM channels, watchdog timers, an internal 24-MHz RC oscillator for a clock, and
<muurkha>
a quasi-Harvard architecture, and it can run down to 2.7 volts
<muurkha>
it comes in SOP8, SOP16, QFN20, and TSSOP20 variants, each with two power pins and the other pins all usable as GPIO (presumably there are internal muxes to allow you to use them instead as ADC, SPI, etc.)
<muurkha>
and a 1-wire SDI ("serial debug interface")
<muurkha>
looking at the pinout diagram, maybe only one of the opamps has its inputs and outputs fully brought out (OPP0, OPN0, OPO) and the other just has one input brought out (OPP1)
<muurkha>
oh, OPN1 is brought out too. so I guess you can use op-amp 1 as a comparator but not an actual op-amp. and you can use it somehow with one of the timer/counters
<muurkha>
20 mA per GPIO pin. for running it's not super low power: 1.07 to 8.02 mA depending on what peripherals you have going, what voltage you're running at, and apparently what you're running. and in power-down mode it still sucks up to 10.26 μA
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<muurkha>
the SPI is up to 24 Mbps, the ADC is up to 430 ksps, but I'm not sure how many bits it is
<muurkha>
even without RISC-V this chip seems like it would be a significant advance over, like, an AVR8, and more like a cut-down version of an STM32F
<muurkha>
apparently in addition to the CH32V003, wch.cn also has ARM versions, CH32F003 and the like
<muurkha>
crudely dividing datasheet numbers, 3.3 V 8.02 mA / 48 MHz = 550 pJ per clock cycle, which is a lot lower power per cycle than an AVR8 but twice as high power as an STM32L, and presumably without a multiplier
<muurkha>
the cheaper Padauk chips have much more flexible programmable I/O than the conventional SPI/I²C/PWM peripherals on this chip, but they don't have ADCs, much less op-amps
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<muurkha>
the part numbering scheme implies the possible existence of chips with USB, SDIO, CAN, DVP (?), FSMC (?), and Bluetooth LE peripherals integrated, but it's possible they haven't made any yet
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<muurkha>
if anyone here speaks Chinese and is willing to take a look at the datasheets on https://www.wch.cn/products/CH32V003.html I'd be delighted to find out if I'm misinterpreting some of that
<muurkha>
in particular I'm interested to know whether the bootloader is part of the 16K, what's the other thing it has 64 bytes of other than EEPROM, what's up with the second op-amp, and whether I'm correctly interpreting the 10.26 μA as its current consumption in power-down mode
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<muurkha>
sure, what are you thinking of doing with it?
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<solrize>
muurkha, someone said it needed both 3.3v and 5v? i didn't look closely. i didn't realized it used the E profile (only 16 registers). i didn't realize anyone did that. E seemed almost useless to me. if you only have 16 registers, you can completely redo the instruction encoding since now you have 3 more register address bits in each word
<tusko>
muurkha, are you refering to my or solrize? I am seeking to get involved in risc-v processor development
<muurkha>
solrize: I have dealt with microcontrollers that do need both 3.3V and 5V but I am pretty sure this is not one of them because it has 6 GPIO pins on the 8-pin version and 18 GPIO pins on the 20-pin version, so it has to be single-supply
<solrize>
tusko, if you mean you want to program risc-v cpus, you might start with gdvf or whatever. that wch thing is mostly for if you want to make a super cheap embedded thing
<muurkha>
gd32vf* seems to no longer exist
<solrize>
muurkha, can you see the package size of the qfn?
<solrize>
oh that is unfortunate about gd
<solrize>
well there is esp32c*
<tusko>
I'm an engineer, so I'm looking more for internship or employment opps
<solrize>
hardware?
<tusko>
Yeah
<tusko>
I heard about rivos, but it sounds like they're being sued by Apple, maybe
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<muurkha>
tusko: you want to design RISC-V processors? have you tried building SeRV or PicoRV32 with yosys and loading it onto an ICE40?
<muurkha>
solrize: yeah, the QFN20 is 3.0 mm ± 0.1 square
<tusko>
muurkha, I don't even know what those things are. Maybe I should do that. I've only built a simple, 5-stage risc-v pipeline for a class
<muurkha>
0.2 mm ± 0.05 mm width of each of the 20 external pads
<muurkha>
tusko: I hardly know either
<muurkha>
solrize: I'm not sure if the thickness is 0.75 mm or 0.55 mm
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<muurkha>
tusko: yosys is a free software Verilog synthesis thing, ICE40 is a family of Lattice FPGAs that it supports well, and PicoRV32 is a RISC-V design in Verilog by the author of yosys that can be synthesized by yosys and loaded onto an ICE40
<muurkha>
SeRV is a much smaller and simpler and slower RISC-V design in Verilog by someone else
<muurkha>
there's a thing called APIO which is like a bundle of yosys and yosys-related things that work together
<muurkha>
solrize: I agree that the E profile wastes three bits per uncompressed instruction
<muurkha>
but the missing registers don't overlap the 8-register set mapped by most of the C instructions
<muurkha>
the datasheet gives different power consumption numbers for running on 3.3 volts and 5 volts, and says Vdd can be 2.7 to 5.5 volts in lots of places
<muurkha>
tusko: do you speak Chinese yet?
<tusko>
lol, basically
<solrize>
muurkha, thanks re dimensions, that is nice and small
<muurkha>
can you look at the datasheet and confirm that I'm not spewing bullshit? because my Chinese is kind of limited to knowing the difference between 最小值
<muurkha>
and 最大值
<conchuod>
palmer: I ended up posting a revert for the clocksource/broken RCU stall stuff. A revert isn't really the right option since it'll break something for the d1 but there's been no response to either of us in a month and a fortnight respectively
<conchuod>
muurkha: imagine learning languages other than american! yikes!
<solrize>
do they save anything but a tiny amount of fab cost in using E? it seems almost useless for a packaged part. might be worthwhile in some deeply embedded core in a corner of an asic.
<muurkha>
conchuod: As ucht Dé
<tusko>
one is min, the other is max
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<tusko>
oh, I see. You were saying you know those two
<muurkha>
right! but not much more than that
<muurkha>
solrize: I think it saves them 512 bits of register file? I'm guessing that's about 3000-4000 transistors?
<solrize>
that's not much these days... any idea of the fab process?
<muurkha>
tusko: I mean can you tell how many bits the ADC is, or what's the other thing it has 64 bytes of that isn't EEPROM?
<muurkha>
(or is it two kinds of EEPROM?)
<solrize>
i thought the cnx article said 10 bits adc
<muurkha>
it's only referenced to Vdd, right? there's no separate Vdda
<muurkha>
or internal bandgap reference or anything like that
<solrize>
oh that would be annoying
<muurkha>
solrize: I'm thinking that probably the 500 pJ per cycle number tells us something about that
<muurkha>
or rather 170 picocoulombs
<solrize>
well maybe the vref uses more power when it is active
<muurkha>
I'm not sure it has a voltage reference (other than I guess an internal LDO or something)
<muurkha>
if they're worrying about saving 3000 transistors it probably isn't a super recent process
<muurkha>
I don't know much about modern CMOS processes but I can imagine that maybe having a smaller register file means your bit lines into the register file have lower capacitance, which could conceivably give you a little bit faster clock rate?
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<solrize>
i dont think they were trying to make a super fast part
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<solrize>
why would a normal embedded thing need 50x more speed than an old school vax anyway
<muurkha>
the part numbering scheme suggests that they make 172MHz versions of the part, maybe only ARM so far
<muurkha>
there's a lot of stuff you can do in software now that the vax had to do in hardware
<solrize>
you mean like the peripheral boards? this part has a bunch of equivalent stuff like the built in uarts
<muurkha>
I was thinking like speech synthesis and recognition, software defined radio, doppler sonar, NTSC color signals, PID control of brushless motors
<muurkha>
although for most of those things RV32ICM or at least RV32ICZmul (?) would seem a lot more advantageous than RV32EC
<solrize>
muurkha, oh i see, but people don't use tiny mcu's for that. does this wch thing not have a multiplier?
<solrize>
can you at least use a multiply instruction and trap it in software?
<muurkha>
I haven't been able to find evidence in the English fragments in the datasheet that it has a multiplier
<muurkha>
maybe tusko can opine more authoritatively
<muurkha>
RV32I and RV32E don't have a multiply instruction
<muurkha>
RV32E doesn't standardize trap handling; that's in the "privileged ISA" spec, which is optional and seems like the kind of thing you'd often skimp on
<solrize>
hmm meh
<muurkha>
if they have an illegal instruction exception you could use a multiply instruction and trap it in software unless their trap handling is totally broken
<muurkha>
but it would be more efficient probaby to call a multiply subroutine
<solrize>
pretty awful if riscv doesn't specify traps
<muurkha>
riscv specifies traps and multiplication and virtual memory and all kinds of things, but not as part of the base rv32i isa
<muurkha>
someone did a thing with one of the Padauk 3¢ microcontrollers where they bitbanged the Neopixel protocol, which required overclocking it to 18 MHz. you might be able to do something like that with a chip like this, and running it at 48 MHz instead of like 20 would be a pretty big advantage there
<muurkha>
especially since it doesn't seem to have the Padauk barrel processor ("FPPA") approach like the CDC 6600's peripheral processors, so you can't really bitbang with tight timing requirements while you're also doing something else
<muurkha>
people do use tiny MCUs for PID control of brushless motors and speech synthesis, and my cellphone 22 years ago had crude speech recognition, so I don't see why you couldn't do it in a tiny MCU nowadays
<solrize>
ic
<muurkha>
I mean you probably know about 7 times as much as I do about this
<muurkha>
so don't hesitate to correct me if I'm full of shit
<solrize>
idk how much speed you need for brushless motors
<muurkha>
probably depends on what you're controlling with them
<muurkha>
a person on a Segway takes millions of microseconds to fall over, a 100-gram drone somewhat less
<muurkha>
a 10krpm brushless motor with 18 magnetic poles needs to change the phase you're driving the windings at every 330 μs I think?
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<dh`>
why would you do that in software when a simple analog circuit would do?
<muurkha>
do what, control a brushless motor?
<tusko>
analog circuits are for gays and communists
<tusko>
(not that there's anything wrong with that)
<muurkha>
well, I sure do love me some fully automated luxury gay space communist analog circuits, but I think there are drawbacks to a fully analog design in many applications. but it depends on which
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<dh`>
don't look at me, I'm in no way an EE
<dh`>
just seems like unless there's a reason you specifically need a microcontroller, the analog circuit is simpler, cheaper, and far more reliable