00:55 <_whitenotifier-1> [YoWASP/yosys] whitequark pushed 1 commit to develop [+0/-0/±1] https://git.io/JihSf

00:55 <_whitenotifier-1> [YoWASP/yosys] whitequark c85bda5 - Update dependencies.

19:25 <_whitenotifier-1> [nmigen] lethalbit synchronize pull request #644: vendor.openlane: OpenLANE ASIC Platform - https://git.io/JiZXy

19:25 <_whitenotifier-1> [nmigen] codecov[bot] edited a comment on pull request #644: vendor.openlane: OpenLANE ASIC Platform - https://git.io/JinMo

22:24 <kaucasus> Maybe a weird question, but how would one go about using/learning to use nMigen "idiomatically". (For a lack of a better word). Because right now I feel like I'm just using nMigen as a better, more saner Verilog/VHDL.

22:27 <kaucasus> Which, of course, is very nice! But everything I do is basically very straightforward init the class and elaborate a module. Here and there a built in nMigen class like EnableInserter, the simulator and board files. So it works of course, but I feel like you can do tons of stuff that I'm just missing.

22:27 <kaucasus> Part of that is me not being *that* familiar with Python

22:28 <kaucasus> And normally I'd work on those issues by just reading the standard library and other people's code, but because of my infamiliarity of Python that doesn't fully work for me

22:30 <kaucasus> So I was thinking if watching some videos could help. Following that, I wonder if watching just a playlist of Robert Baruch's videos could do the trick, but with a runtime of over 8 hours it's... a lot

22:33 <tpw_rules> i mean this is my 2 cents but a more saner verilog is kind of nmigen's place to me, at least for a lot of logic

22:33 <tpw_rules> but also there is python as an extremely powerful `generate` statement

22:33 <tpw_rules> so it's easier to parameterize stuff, easier to automatically create things, but if you don't need that stuff then you don't need it

22:39 <kaucasus> Yeah, it's mostly the "automatically creating things" I'm still having problems with. Like earlier today I had a problem where I thought. "oh this bit of (programming) logic comes up in quite a bit of different places". And my approach to solving it was "Well make a new module, give it a ton of configuration signals in a layout, connect and send it

22:39 <kaucasus> all over the place in the top module". Which of course works, but it feels like there's more in the tank, so to speak

22:41 <kaucasus> Well that and the light discomfort and eery tingling you get in the backside of the brain as a dev when you're repeating a lot of code