00:39 <cr1901> shorne: That's pretty good uptime

05:02 <shorne> darn, now after rebuilding linux wont boot, debug time

05:34 <jevinskie[m]> I hate that! Same thing here, left a litex project for a month and now I’m driving conflicting values to a signal

06:32 <shorne> ok, it boots now, I am trying to boot the rootfs off the sdcard and it doesn't seem to like that maybe, let me try something else

06:42 <_florent_> shorne: nice for the uptime! Sorry to hear something broke, I don't think we made changes to the gateware in the last 2-3 months that could explain this, but if you can find a commit that still works and one that no longer works, I can look at this.

06:43 <_florent_> jevinskie[m]: Can you give more information? On which core do you have a driving conflict?

06:50 <sajattack[m]> I don't know what I did (probably screwed up my buildroot somehow) but opensbi reports the proper 8 core imafdc and linux (/proc/cpuinfo) reports a single ima core

06:51 <sajattack[m]> any ideas what I broke within buildroot?

06:52 <sajattack[m]> it's also reporting 55MB of RAM instead of 1GB

07:05 <jevinskie[m]> Oh this was my own design, not in litex core. I’ve since fixed the issue :)

07:07 <jevinskie[m]> One thing I can report is a build error in toolchain selection when switching from cpu-type != None to None. Was confusing at first but I know the automatic build refresh is a WIP

07:24 <jevinskie[m]> It was a bug in my altera jtag primitive addition to jtag.py. It works with ftdi adapters but my main goal is to get it working with usb blaster since so many are built in (e.g. DECA w/o another serial port). The timing seems to be off since it is sensitive to clones (that are still valid JTAG, just slow/weird) and jtag clock. Hopefully this breakout adapter for my saleae probe will help me find the root cause

07:24 <jevinskie[m]> https://postimg.cc/gallery/rr2Q10b

07:24 <tpb> Title: Album — Postimages (at postimg.cc)

08:41 <shorne> _florent_: nothing broke, I was playing with my dts and boot.json, I got it working now

08:42 <shorne> strange thing... my boot.json loads a boot.bin, or1k-mor1kx.dtb, rootfs.cpio.gz

08:42 <shorne> If I removed the rootfs.cpio.gz the boot fails

08:42 <shorne> if I add back a dummy file.. i.e. dummy-rootfs.cpio.gz with "dummy" in the content it works

08:42 <shorne> something strange with the boot loader... but I got it working

08:43 <shorne> 32-bit OpenRISC CPU with MMU integrated in a LiteX SoC

08:43 <shorne> Swap: 1907 0 1907

08:43 <shorne> Mem: 248 4 230 0 12 237

08:43 <shorne> total used free shared buff/cache available

08:43 <shorne> # free -m

08:43 <shorne> now I have a lot of free memory because I am not using ram disk

08:45 <shorne> and boot time is about 6 seconds until network service come up, no time wasted unpacking the rootfs

09:42 <_florent_> shorne: ok good

09:43 <_florent_> jevinskie[m]: I'll look at the build issue with cpu_type = None, I think I also saw it this week

18:01 <Melkhior> sajattack[m]: Yes I was compiling natively - and yes I cross-compiled binutils & gcc to create the native tools. I also had to copy includes & some other stuff from a buildroot intermediate directory to the micro-sd card (which I use for boot & root)

18:03 <Melkhior> I use a somewhat patched GCC to test stuff (e.g. https://github.com/riscv-collab/riscv-gcc/pull/267 )

20:02 <sajattack[m]> how big is the final compiler? I don't have external storage

21:06 <Melkhior> sajattack[m]: quite significant - too much to sensibly fit in a RAM-based filssystem. Plan B is to NFS-mount it, but you need Ethernet...

21:08 <Melkhior> There's some sort of ethernet-over-pcie available from Xilinx, but I don't think there's something similar for Litex

21:33 <sajattack[m]> yeah that's what I need

21:34 <sajattack[m]> that or some kind of breakout for the gpio on this thing to sd card

21:49 <sajattack[m]> or turn it into a pcie master and have it access my nvme xD

21:49 <sajattack[m]> directstorage

22:12 <sajattack[m]> <sajattack[m]> "I don't know what I did (..." <- I think this was because I didn't update my dtb

23:21 <sajattack[m]> is there a way to run our litex buildroot in qemu? I think it would be faster than litex sim

23:22 <sajattack[m]> I tried this and a few different variations of the same but just got no output

23:22 <sajattack[m]> sudo qemu-system-riscv32 -nographic -machine virt -kernel Image -append "root=/dev/vda ro console=ttyS0" -initrd rootfs.tar.gz

23:22 <sajattack[m]> ```

23:22 <sajattack[m]> ```

23:23 <sajattack[m]> also with -bios opensbi.bin

23:27 <sajattack[m]> and ttyLXU0

23:48 <jevinskie[m]> I don’t think qemu will have a tty driver for the litex console, will it? Unless you build whatever uart module QEMU emulates as well.

23:49 <sajattack[m]> I suppose not