sorear changed the topic of #riscv to: RISC-V instruction set architecture | https://riscv.org | Logs: https://libera.irclog.whitequark.org/riscv | Matrix: #riscv:catircservices.org
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<somlo> looks like it's written in system verilog
<somlo> wondering if yosys has enough system verilog support to build it for an fpga...
<somlo> on the less optimistic side, the git repo has 3 commits (so it currently looks like a "throw the sources over the fence" situation)
<gurki> somlo: it tends to be nontrivial to port asic -> fpga
<somlo> they explicitly mention running their RTL on an fpga, in the README.md file :)
<gurki> emulating on fpga is "coming soon" :p
<somlo> anyway, I like the idea of a maintained RV64G[C] design that's written in language that's not, um, "experimental" -- hope they stick around and maintain it in the long run
<sorear> cva6?
<somlo> doesn't look like it supports the "fd" part of "g", at least at a cursory glance -- so no Fedora distro capability (opensbi adamantly refuses to emulate f and d in m-mode :)
<somlo> basically, I want RocketChip but written in Verilog, so it doesn't grind to a halt when all the Chisel-speaking contributors suddeny get fired
<somlo> *suddenly
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<sorear> what doesn't support fd?
<sorear> ... dunno why the cva6 README doesn't mention the FPU when the rest of the docs do
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<somlo> huh, maybe I should dedicate some spare cycles to studying cva6, then...
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<drewfustini> no problem, i have filters to pick up anything related to t-head and i also read linux-riscv
<drewfustini> glad to see you posted it!
<drewfustini> i've been at baylibre this week and heading home this weekend so i should be able to test soon
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<drewfustini> are the other peripherals actually working in your tree?
<Esmil> yes, on my Lichee Pi 4A at least
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<Revy[m]> rebase on v6.6.7
<drewfustini> nice
<Esmil> though the mmc tuning fails on the sd-card, and sometimes on the mmc too, but we talked about that already
<drewfustini> Interesting, I've seen it on sd card, but never on eMMC.
<drewfustini> But yeah the newer t-head sdk release has some new tuning functionality that I need to port to mainline
<Esmil> Revy[m]: hey! do you know if it's possible to build the TH1520 vendor u-boot with EFI booting enabled?
<Revy[m]> 198000000 to 100000000
<Revy[m]> Esmil: I haven't tested it
<Esmil> I tried compiling the lpi4a branch of https://github.com/revyos/thead-u-boot.git with the light_lpi4a_defconfig, but that seems to lock up with the laste message:
<Esmil> wc3_gadget_conndone_interrupt speed:0 dwc3_dsts:0x23958
<drewfustini> Revy[m]: do you mean lower the speed from 198 MHz to 100 MHz?
<Revy[m]> drewfustini: Yes.
<Revy[m]> thead-kernel is also planned to change it.
<Esmil> Revy[m]: The u-boot-with-spl-lpi4a.bin in Sipeeds debian image works. It says "U-Boot SPL 2020.01-ga50d8b9d", but the a50d8b9d commit is not in the repo above
<Revy[m]> Some patches in sipeed are not synchronized to revyos.
<Esmil> Revy[m]: ah, do you know where I can find their repo?
<Revy[m]> I don't know. I need to ask sipeed.
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<Esmil> Revy[m]: that would be great. Does the lpi4a branch with the light_lpi4a_defconfig work for you?
<Revy[m]> If you're flashing a new uboot, you'll need the corresponding kernel. And reset the environment.
<Esmil> Hmm.. but for me u-boot locks up before i even get a prompt to load a kernel
<Revy[m]> The uboot and kernel from the T-Head release need to match.
<Revy[m]> I plan to retest uboot on Monday.
<Esmil> Revy[m]: ah, cool. it would be great if you could also enable CONFIG_EFI_LOADER=y CONFIG_CMD_EFIDEBUG=y CONFIG_CMD_NVEDIT_EFI=y
<Revy[m]> ok
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<Revy[m]> EDK2 on sg2042
<drewfustini> Revy[m]: great! you got a SG2042?
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<Esmil> Revy[m]: btw. on the Lichee Pi 4A the two ethernet phy's are on the same MDC and MDIO lines. if you want to you gmac0's mdio for phy0 and gmac1's mdio for phy1 you'd need to switch pinmux in-between the two gmac's can both control the same pins. alternatively you can just tell gmac1 use the phy through gmac0's mdio as is done here:
<Esmil> then both ethernet ports can work at the same time
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<gurki> Esmil: does this mean you cannot get both interfaces full speed simultaneously? Oo
<Esmil> gurki: no, what I meant is that you can have both gmac0 and gmac1 working with my tree, but Revy's tree only enables gmac0
<gurki> ah. thanks for dumbing it down for me :)
<Esmil> yeah i also completely butchered english in that message, so no wonder you were confused ;)
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