sorear changed the topic of #riscv to: RISC-V instruction set architecture | https://riscv.org | Logs: https://libera.irclog.whitequark.org/riscv
<conchuod> rneese: are you trying to do that on the visionfive 2?
<drmpeg> It's in their config.
<conchuod> whyyyy
<drmpeg> Dunno. You'll probably have to grep their kernel.
<rneese> its out of the kernel file but its erroing
<conchuod> What do you mean "it is erroring"
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<rneese> [ 0.322706] L2CACHE: DataError @ 0x00000000.08040140
<rneese> [ 0.322780] L2CACHE: DataFail @ 0x00000000.0804005B
<drmpeg> That's actually normal.
<conchuod> Do you see that once during boot
<conchuod> or constantly
<rneese> at boot
<rneese> I also have 2 other issue then I think we have it all working
<rneese> [ 1.238799] starfive-cpufreq soc:starfive,jh7110-cpufreq: Failed to get regulator for cpu!
<rneese> [ 1.238831] starfive-cpufreq soc:starfive,jh7110-cpufreq: Failed to init starfive cpu dvfs info
<drmpeg> It's just a spurious interrupt. Happens on unmatched also.
<rneese> ok
<conchuod> Yah and PolarFire
<rneese> [ 1.240650] jh7110-sec 16000000.crypto: Unable to request sec_m dma channel in DMA channel
<rneese> [ 1.240683] jh7110-sec 16000000.crypto: Cannot initial dma chan
<conchuod> So they have manual L2 flushing in their visionfive2 specific config...
<conchuod> That seems odd to me!
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<rneese> everything else is working no issues other then the gigbit interface but we are close with it
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<rneese> [ 4.240452] usb usb2-port4: over-current condition
<rneese> dont know where this is coming from or fix
<rneese> yet
<rneese> [ 4.301867] vs-dc 29400000.dc8200: can't request region for resource [mem 0x17030000-0x17030fff]
<rneese> [ 4.310670] vs-dc: probe of 29400000.dc8200 failed with error -16
<rneese> thast the last of the errors we get
<rneese> so we have a working build few small snags
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<rneese> so I have to figure our whats broken
<rneese> 2 lines missing from kernel 5.15.94 of ours
<rneese> CONFIG_SIFIVE_L2=y
<rneese> CONFIG_SIFIVE_L2_FLUSH=y
<rneese> but they hav -*-next to themin the kernel config
<rneese> nm
<rneese> its in the main config
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<jrtc27> conchuod: probably because they copy pasta'ed it from their jh7100 hacked up tree
<rneese> well its whats in the conifg from the img 96
<rneese> thats what we started with
<conchuod> I'd probably just delete all that flushing stuff from the jh7110 configs
<rneese> ok
<conchuod> I've not looked at their downstream dt at all, but it's all cache coherent now afaiu so that shouldn't be needed
<rneese> this will go alot faster when the board is here
<rneese> the case is coming also butit will go out for a paint job
<rneese> top is going to be the RV logo
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<rneese> then to order the blue nd yellow keycaps
<rneese> and find a keyboard to recap
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<rneese> ok what am I missing
<rneese> [🐳|πŸ”¨] ERROR: modpost: missing MODULE_LICENSE() in sound/soc/codecs/snd-soc-wm8960.o
<rneese> I check the file its set to GPL
<rneese> what is missing in the kernel to fix this
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<rneese> where in the kernel is cc_can_link set
<rneese> thats whats missing
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<rneese> clear
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<geist> aww crap the 7110 has one of those annoying external L2 cache controllers?
<geist> dont tell me that function takes physical addresses
<geist> not that it's clear at all because it's just an unsigned long
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<bjdooks> geist: the ccache is an external cache
<geist> yah that much i figured. usuallythat also means it’s physically tagged, and thus you have to flush it by paddr
* geist has memories of the pl310 that was frequently paired with the cortex-a9 back in the late 2000s
<geist> is this particular L2 common on a lot of sifive designs or particular to this JH7100?
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<bjdooks> geist: yes, it's now also a L3 cache
<bjdooks> urhg, i've really ballsed up the backporting of this zicboz stuff
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<rneese> anyone working with the Ox64 ?
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<geist> Hmm guess the question is is all the DMA on the sifive designs cache coherent, such that flushing the cache isn't required much
<geist> in general since the designs i've worked with at least (u54, u74) don't have any ability to mark pages cached or uncached, i've just assumed the whole thing is cache coherent
<geist> otherwise having to do a translatino on every page as you flush it through the L2/L3 is really really expensive
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<conchuod> geist: Yeah it is coherent, which is why I don't get them having that stuff turned on in a jh7110 config
<rneese> i think that alot of it came from the sifive unmtched and they used it by default
<rneese> but we will be turning it off in ours
<rneese> but we had planned to support as many boards as we can in the long run
<rneese> but the starfive v2 is the default now
<rneese> and the v1 for those still using it as a dev
<rneese> and the beaglev until they canupgrade
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<drmpeg> No, unmatched uses a mainline kernel. None of that stuff is in mainline.
<conchuod> rneese: it comes from the jh7100
<conchuod> rneese: Are you doing custom kernels for every board, or the same kernel everywhere?
<rneese> well we where planning on 1 kernel for all the diff boards since its all riscv
<rneese> sor starfive and sifive boards
<rneese> the d1/nezha/mangopi will have thier own
<rneese> at the min we are working to fix a fb bug
<conchuod> Why do the d1 boards need a different kernel?
<rneese> some how multi fb got activated and not its spews some random stuff on screen
<rneese> diff patches at the min
<rneese> we are working to get all the patches up and in but we have issues with nezha and mangopi wifi not workign and sounds not working
<conchuod> [ 7.213420] DEBUG_LOCKS_WARN_ON(lock->magic != lock)
<conchuod> heh
<rneese> thats just our test kernel testing things
<rneese> we ware testing with a remote board .
<conchuod> Your testing has found a problem
<rneese> so limited to what we get so we turned on debuging to check thigns
<conchuod> plda is their pci ip?
<conchuod> pci_device_probe
<conchuod> so ye, and that's probably not in mainline at all
<rneese> this is 5.15.94 noodles rebased with the 5.15.0 src from starfive
<rneese> so thata we had a more updated kernel to work and devel with
<conchuod> noodles?
<rneese> all the patches they haad in 5.15.0 are there
<rneese> his nick on oftc.net irc
<rneese> #debian-riscv channel
<rneese> that is the fully updated . but needs a few patched
<rneese> the sounds wm9860.c needs the gpl added to the end the Licensing
<rneese> the jh71110-viaionfive-v2.dtsi needs a patch for the mene to fix the 4 gig to read 8 gig
<conchuod> Why does it need a patch? Won't that break the 4 GiB boards?
<rneese> no
<conchuod> Shouldn't the bootloader be setting that?
<rneese> the bl needs some major work
<rneese> and as we are not using the dtb files from the 69 img
<rneese> your welcome to the config
<conchuod> Nah, dw
<rneese> if there is a furthe fix and the bl neds to be fixed
<rneese> my board will be here tuesday/wednesday
<rneese> and I plan to pound out things hard and figure otu all the issues
<rneese> and report what we find
<rneese> as we compile the kernel for our builds
<geist> ah yeah: re the L2 stuff the reason I'm thiking about it is i'm worknig on another OS and will need to worry about these coherency issues
<geist> was hoping the whole 'cycle through L2/L3 by physical tag' wasnt going to be a thing here
<rneese> ah conchuod we do plan to support the vf2/unmatched/nezha/mangopi/star64
<rneese> but I am waiting for a star64 to be released to test with it also
<conchuod> I'm just a curious bystander, support what your users want :)
<rneese> my mangopi is on backorder
<geist> oh hey my vf2 just shipped from ameridroid
<rneese> cool
<rneese> yeah they are starting to ship
<rneese> i have a 120 gig nvme ready and a 64 gig emmc and8 gig emmc
<rneese> and to find out if a single header ver works or if it has tobe dual header version
<rneese> they dont have docs on the emmc
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<rneese> I have single header emmc
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<rneese> who flashed thier board and it stopped working
<rneese> thereis a bl recover
<rneese> in the qst
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<larsen> I had just flashed my VisionFive 2 board yesterday, first to Debian's image-55 to update the firmware then to the current image-69. Would I have to reflash the OS each time to update or would Debian allow upgrading through apt?
<mps> larsen: yes, it should allow upgrade
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<jrtc27> conchuod: their uboot has a working command that patches the device tree to have the right memory range defined
<jrtc27> unfortunately it doesn't get called during the default boot sequence...
<conchuod> I wouldn't know, I threw out their u-boot env ;)
<conchuod> Hopefully they can sort that thought
<conchuod> though*
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