<byte33>
Hi friends, I am part of a university group implementing a RISC-V core in HDL and our end goal is to boot to a minimum viable Linux kernel. Part of my discovery is finding what extensions (specifically the bare minimum instructions) we need to implement in order to boot Linux. My current plan is to build a barebones Linux kernel, objdump it and grep for the instructions to see which ones I need
<byte33>
Would this be a good approach? also apologies if this kind of post is not allowed, I'm new :D
<byte33>
oh also, the current plan is implementing an RV64IMA core
<jrtc27>
(assuming your i includes zicsr and zifencei)
<byte33>
jrtc27: thanks for the reply! yeah our i would include zicsr and zifencei. does the rv64 baseline mean that indeed, rv64ima would be the minimum needed?
<byte33>
I plan on doing a deeper dive into the disassembly and checking exactly which instructions are needed as we want to boot linux as quickly as possible with the most simple hardware
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<conchuod>
rv64gc is the "standard" at this point and rv64ima is the minimum
<conchuod>
If you do a defconfig build, depending on compiler, you'll get more though
<conchuod>
I probably wouldn't rely on what you reverse engineer from objdump as being consistent, unless it's all of ima
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<conchuod>
Heh, that qemu sig thing is at 0300, lolnope
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<drmpeg>
VisionFive 2 came in the mail today.
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<conchuod>
Nice :)
<drmpeg>
Need a power supply though. I don't have any USB-C in the house.
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<mps>
drmpeg: I use 5V power adapter attached to gpio header pins on visionfive v1 without problems
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<mps>
iirc I've got usb-c adapter with VF v1
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<drmpeg>
I think I'll go USB-C.
<geertu>
drmpeg: If it's anything like Starlight, you can use a USB A-C cable with an old USB-A charger for a phone.
<drmpeg>
I only have those little 5W blocks that come with the iPhone.
<drmpeg>
Not much of a phone user here. Still on an iPhone 7.
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<rneese>
well I have the visinfive images up and they work . so thats it for them for now
<rneese>
next it to get a cli in=mg for v2 working
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<rneese>
hey esmil you around
<geertu>
Esmil: ^
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<cousteau>
Hi
<cousteau>
Does RV64E exist, or planned to exist?
<muurkha>
I haven't heard anyone talk about it, but it seems like if you want to have only 1024 bits of general-purpose registers, you'd be better off with RV32I than RV64E
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<conchuod>
rneese: if you said what you need from him, perhaps other people could help & you'd not need to wait from him to say he is here, before typing your request ;)
<rneese_>
wanted to see abot getting the starfive visionfive2 devel kernel src updated to 5.15.59
<rneese_>
it seems to be at 5.15.0
<rneese_>
I need to learn next to make patches against src and make patch files when needed
<conchuod>
Why .59 and not .92?
<rneese_>
might be 92
<rneese_>
sorry i miss read the ver
<rneese_>
but yes
<conchuod>
At this rate you need a direct line to starfive of your own!
<conchuod>
Creating patches would be a good skill to learn if you're running a distro!
<rneese_>
is there a good base how to for reading
<conchuod>
Kernel newbies perhaps?
<cousteau>
muurkha: the thing is, for heterogeneous architectures (think one big RV and many small ones), mixing 32 and 64 archs seems to be hard
<jedix>
use git and make it generate the patch
<cousteau>
Like, "I want the smallest possible RISC-V that is 64 bits"
* cousteau
is unsure how much of an advantage RVE is, regarding resource usage... nor how important are the extra 16 registers regarding performance, like, are they really that useful?
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<conchuod>
rneese I just read the git docs for format-patch
<conchuod>
It's not very difficult
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<rneese_>
ok
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<muurkha>
cousteau: interesting points
<cousteau>
I guess the smallest RV64 one can get nowadays is RV64I, although I think rocket-chip supports enabling E in 64-bit archs (but then again, there's the issue of software support; I don't know if compiler toolchains support rv64e already)
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<cousteau>
I was also toying with the idea of a processor that could work as either an RV32I or an RV64E, with a 1024-bit register bank that would work on two different modes
<cousteau>
...well, 992-bit, actually
<cousteau>
No idea how useful this would be in practice
<muurkha>
heh, I was also thinking about the missing x0
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<cousteau>
Imagine having x0 actually implemented as a read-only register, and then somehow accidentally overwriting it
<muurkha>
haha
<muurkha>
I don't think that's likely to happen in hardware :)
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<cousteau>
(1) single-event upsets, (2) poorly designed hardware
<cousteau>
I bet I would somehow manage to make (2)
<cousteau>
(this is why everybody is crazy about formal verification these days)
<muurkha>
well, in software you might have an incentive to actually implement it as a read-only register, because it means you don't have to do a conditional run-time check
<muurkha>
but in hardware a conditional is a mux, and that's what you use to figure out which register to read from anyway
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<jrtc27>
re writable x0, we had that as a bug a long time ago in our MIPS soft-cor
<jrtc27>
*e
<jrtc27>
something about reads also being short-circuited so you wouldn't actually notice, except in corner cases?
<jrtc27>
was before my time here
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<muurkha>
jrtc27: heh, thanks for proving me wrong!
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<valerius>
ooooh yeah, should have my VisionFive 2 shortly :)
<geist>
oooh exciting! i'm hoping mine ships soon too
<rneese_>
well if I can fix out bug we will have a simple debian builder easie then what they do on starfive
<rneese_>
man the do it so convaluted
<rneese_>
but we found where its not linking 2 files
<rneese_>
bbiab fixing
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