sorear changed the topic of #riscv to: RISC-V instruction set architecture | https://riscv.org | Logs: https://libera.irclog.whitequark.org/riscv
<bjdooks> not sure what the max core count is for that generator
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<solrize> core coherency = just more silicon right? what do you mean by generator?
<solrize> i mean is there some obstacle to high core counts as found on x86 and arm? i had figured with random arm vendors licensing fees were an issue, but with riscv they could go wild
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<keegans> I am trying to understand why I cannot use xfel to start OpenSBI's fw_jump on my Mango Pi MQ Pro. I was thinking that I could do `xfel write 0x80000000 fw_jump.bin` and `xfel write 0x80200000 kernel.bin` and then `xfel exec 0x80000000` however it does not work
<keegans> The fw_jump.bin and kernel.bin boot in QEMU with the -bios and -kernel parameters, respectively, and I was able to boot xv6-d1 using xfel
<keegans> By not work, I mean, there is no OpenSBI banner over serial, and my code in kernel.bin is not executed either. There is output over serial when I run the initial ddr controller setup, though
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<bjdooks> keegans: not sure how opensbi decides to print the banner, I know it does on qemu and doesn't on an unmatched
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<bjoto> No PW synch today? (I'm in the lobby...)
<bjoto> I'm in -- thanks!
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<palmer> bjoto: sorry, I'd lost my glasses ;)
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<pjw> Off the top of my head, I can't think of any significant differences between the FU540 and FU740 boot ROMs
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<bjdooks> pjw: thanks
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