sorear changed the topic of #riscv to: RISC-V instruction set architecture | https://riscv.org | Logs: https://libera.irclog.whitequark.org/riscv
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<vineetg762> conchuod: yeah in the past I'd always mentioned "Tested-by" :-)
<vineetg762> jrtc27: yeah my initial code was really sloppy
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<conchuod> vineetg762: for lkp?
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<conchuod> I figure with these things that Greg knows what's up :)
<vineetg762> conchuod: yeah, it doesn't matter
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<conchuod> If you can buy a visionfive 2, it's probably the best option? Failing that, probably a d1 board?
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<gzar> visionfive 2 is like 400 eur
<gzar> kind of expensive, and it has AI stuff which i dont need
<andyc> vineetg762: I am adding full prctl supports, which includes ptrace, signal, and some process context switch part.
<drmpeg> gzar: Where's that price? I only paid $93 for a 8GB VisionFive 2.
<gzar> newegg, its the only place i can find it
<drmpeg> Oh, that's the VisionFive 1.
<drmpeg> I see the VisionFive 2 on Amazon and Ameridroid, but it's all pre-orders.
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<conchuod> geertu: that one is something that my own CI should have complained about...
<conchuod> Ack of shame!
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<geertu> conchuod: checkpatch should have told you, too
<geertu> But once in a while we all miss stuff like that...
<conchuod> Yah just makes me a hypocrite that's all!
<bjdooks> for a while i made checkpatch a part of my kernel git checkin process
<bjdooks> conchuod: i assume i don't have to deal with the fu740 pcie window for now
<conchuod> Should be in next, no?
<conchuod> Was gonna send it to Arnd today
<conchuod> geertu: you need the renesas email for reported bys?
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<bjdooks> conchuod: i've not checked, i've got like 20 different other things that aren't riscv kernel related
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<geertu> conchuod: yeah, that's fine, now Renesas has a RISC-V SoC
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<conchuod> Thanks
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<mps> mainline linux 6.2-rc3 now boots and shows boot messages on serial console but stopped at finding mmc, driver for mmc dwmac starfive is not kernel
<mps> on visionfive v1
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<mps> sorry not dwmac
<mps> mmc driver
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<conchuod> mps can you clarify what config file you are using?
<mps> conchuod: I made it with make nconfig
<mps> I could post it to paste service
<mps> if you want to see it
<conchuod> Sure
<conchuod> That'd be helpful
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<conchuod> Perhaps the mmc is one of the things that needs non coherent dma
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<mps> ahm it is for VF v2
<conchuod> Yah, the VF2 is coherent
<conchuod> I just use Emil's tree for the v1 board
<mps> also I use his tree but wanted to look how far mainline is reached
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<prabhakarlad> palmer: At what offset does the kernel allocate va's from?
<prabhakarlad> is it similar to arm64 https://docs.kernel.org/arm64/memory.html ?
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<jrtc27> that page doesn't say for arm64?
<jrtc27> but https://docs.kernel.org/riscv/vm-layout.html is the riscv equivalent
<jrtc27> I assume for both it's "anywhere in the user range except for the page at address 0"
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<prabhakarlad> jrtc27: thank you for the link. so we dont have to worry about the linux kernel allocating va in the ranges of local memory for rz/five
<prabhakarlad> as far as the user space goes Im working either to patch in gcc/binutils to adjust the va offset beyond local memory.
<jrtc27> huh? the local memories are in that range
<jrtc27> probably in practice you only get things before the second superpage if you explicitly ask for them, but idk
<jrtc27> also, the world isn't just gcc+binutils, even in linux land
<jrtc27> people like to use lld because it's fast
<prabhakarlad> sorry did I get this wrong? So the below only goes for use space
<prabhakarlad> 0000000000000000 | 0 | 0000003fffffffff | 256 GB | user-space virtual memory, different per mm
<prabhakarlad> s/use space/user space
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<prabhakarlad> plan is to also patch llvm & clang too
<jrtc27> 0x30000 is between 0 and 0x0000003fffffffff last time I checked
<jrtc27> oh you mean kernel allocating vas for itself
<jrtc27> I thought you meant allocationg vas for userspace
<jrtc27> ie for mmap(NULL, ...()
<jrtc27> *)
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<prabhakarlad> "oh you mean kernel allocating vas for itself"
<prabhakarlad> yes I meant kernel :)
<prabhakarlad> I was more worried about kernel, as that would mean we would have to carveout a va region so that kernel avoid picking up those regions. And this would have meant patching to the kernel.
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<prabhakarlad> Im not worried about userspace much as the PMP patch will take care of killing it gracefully ;)
<muurkha> heh