sorear changed the topic of #riscv to: RISC-V instruction set architecture | https://riscv.org | Logs: https://libera.irclog.whitequark.org/riscv
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<josuah> `join_subline: that is too much to fit a single sublime submarine ;)
<josuah> gordonDrogon: have fun! it is probably easier to use an open source toolchain after getting the board to work at least once
* `join_subline :) #sel4 🚪..🏃
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<gordonDrogon> josuah, thanks. it's going to be a day or 2 before I can clear some time for it but I'm glat I wrote my own little RV emulator on my existing system first - at least I have a better clue about debugging RV code.
<gordonDrogon> I can run my entire OS (without interrupts, so no multi-tasking) under my emulator completely unchanged at the bytecode level.
<gordonDrogon> it's just a little slow but I can not get about 2K RV instructions/sec out of it - not bad for a 16Mhz 8/16 bit CPU... The RV code is also more than 5x more efficient than the existing '816 code too, so even with a 16Mhz RV 'CPU' it would fly ...
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<muurkha> gordonDrogon: have you implemented the privileged spec?
<muurkha> 2000 emulated instructions per second on a 16MHz 65816 sounds a bit slower than I'd expect
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<gordonDrogon> muurkha, no - just RV32M
<gordonDrogon> the emulator is written in BCPL which compiled to a bytecode which is interpreted by '816 assemblr. I think it's doing ok...
<gordonDrogon> so I need to find some 32-bit fp software but I am guessing there are libraries in the gcc suite somewhere...
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<muurkha> aha, yeah, that makes sense
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<gordonDrogon> I quite like that I'ev been able to emulate RV in BCPL to help me learn more about RV, then use my emulator to run my BCPL system ...
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<josuah> > my own little RV emulator
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<josuah> impressive, I am nowhere that far
<josuah> > entire OS [...] emulator written in BCPL [...] emulate RV in BCPL [...] then use my emulator to run my BCPL system
<josuah> wow! :D
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<josuah> why BCPL btw? I imagine it was at its strongest between 1967 (BCPL birth) up to 1972 (C's birth), did you happen to be system-programming around these dates?
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<gordonDrogon> josuah, for the love of 'retro' ;-)
<gordonDrogon> the story is long, but I wanted to see what I could do with todays knowledge and technology of the time I starte din computing (lets say 1978) so Apple II, 6502 then in 1981, BBC Micro (let not count university minis & mainframes)
<gordonDrogon> so I made my 6502 system made it do Apple II stuff, then BBC Micro stuff, then advanced to the 65816 CPU but what I was really after was a high level language that the system could self-host.
<gordonDrogon> There were C compilers for The Apple II and BBC Micro, also Pascal, but making them work today on homebrew hardware is not easy, so I feel back to BCPL which I did use a lot in the early 80's on BBC Micros...
<gordonDrogon> so I got BCPL going then wrote my little OS in it (which I'm still developing) and can edit and compile BCPL programs on my own hardware.
<gordonDrogon> it's workable but not that fast - the 65816 is not the best CPU for anything - yet another "too little too late" CPU in 1984 and it's a PITA to write good code for with the 64K banked RAM and other shenanigans like an 8-bit data bus and 16-bit registers, so like Acorn before me, I looked at where next and so Acorn devloped ARM, I want to go down a different RISC route, so RISC-V ..
<gordonDrogon> and here we are today :-)
<gordonDrogon> here is a demo on a serial terminal.. https://www.youtube.com/watch?v=Bg-DcjrJ8g0
<gordonDrogon> also a demo of it multitasking in bcpl: https://www.youtube.com/watch?v=ZL1VI8ezgYc
<[exa]> oh wow cool
<[exa]> and that emulates the riscv?
<gordonDrogon> a bcpl program.
<gordonDrogon> er, yes.
<gordonDrogon> and I can run the entire bcpl OS inside the risc-v emulator too.
<gordonDrogon> (slowly)
<gordonDrogon> I'll make a video soon just for the fun of it..
<gordonDrogon> I know I could have used one of the many RV emulators out there not to mention qemu, but I wanted to do it this way to help get me head into RISC-V code and just because for the joy of it.
<muurkha> I've been thinking about this whole bytecode virtual machine thing
<gordonDrogon> java and python both use a bytecode - older was ucsd-p system for pascal
<muurkha> and I'm wondering how far you could strip down something like Dalvik or Smalltalk and get better performance than an interpreter with a JIT compiler
<muurkha> maybe not on a 65816 though
<gordonDrogon> I'm not a compiler writer (for now) but it does let you create an "ideal" code for the compiler of your chosen language...
<gordonDrogon> I'd avoid the 65816 for now... for ever.
<muurkha> heh
<gordonDrogon> half my bytecode interpreter for my bcpl system deals with the 64K banks of RAM and linearising it for the bcpl programs so I can allocate and iterate over arrays > 64K...
<muurkha> because if you have a really simple JIT compiler from your bytecode to whatever native architecture you're running on
<muurkha> maybe with a 5× slowdown over good native code
<muurkha> and compile whatever you're emulating to that bytecode
<muurkha> then you can do as many layers of emulation as you like without getting the kind of exponentially growing slowdown you're seeing
<muurkha> I mean obviously this is not a new idea since it's how LuaJIT, HotSpot, Self, and most Smalltalks work
<muurkha> but they aren't very well suited to emulating other CPUs
<gordonDrogon> the risc-v code for the bcpl bytecode was almos a joy to write compared to the '816 code.
<muurkha> yeah, I remember
<gordonDrogon> the bcpl compiler does have a back-end that generates a slightly different code that's supposed to be easier to subsequently translate to native code but I've not investigated that yet.
<gordonDrogon> I figured it was going to be far too hard on the '816 and the code size ... big.
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<muurkha> the BCPL operations mostly seem like they'd be reasonable to compile to almost-fixed chunks of native instructions, though you'd want to do register allocation probably
<gordonDrogon> I think I can translate the instructions into RV code snippets though - the tricky part is calculating the jump offsets, but maybe I can just let an assembler deal with that...
<muurkha> yeah, and jump offsets
<muurkha> but that's not really very complicated
<muurkha> do you know about Henry Baker's COMFY-65? something like it might be a nicer intermediate representation than bytecode with jump instructions in it
<gordonDrogon> the virtual machine has 3 registers which work in a sort of stack - well the first 2 do. there are 3 other registers for stack pointer, program counter and globals pointer (global variables and function linkage)
<gordonDrogon> not heard of that - let me find it...
<muurkha> let me know if you have trouble
<gordonDrogon> found something - it's sort of lispy?
<gordonDrogon> if I get into compiler writing, I sort of fancy a pascal, or pascal-like something - and if I can compiler into cintcode (the same bytecode bcpl uses) then it might be do-able ...
<gordonDrogon> although getting my existing BASIC thing going in bcpl is probably something I want to do first. (I wrote a BASIC in C some years back - it's sort of like a one-pass compiler into tokens but absolutely everything is tokenised and there is a "jit" compiler for the expression evaluator...)
<gordonDrogon> actually, it's not JIT it's a "remember the evaluation stack for the next time round the loop" sort of thing...
<gordonDrogon> I think 'cache' might be a better word ;-)
<gordonDrogon> there is a "minamalist computing" group on facebook - they might like Comfy..
<muurkha> yeah, he was using Lisp
<muurkha> and you could argue that COMFY comes from a Lispy view of the world: recursively defined but imperative
<muurkha> but I think it probably fits equally well into ML, Haskell, Python, Perl, or JS
<gordonDrogon> it's an avenue of programming I've generally not looked at.
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<muurkha> it's a very different approach from a traditional assembler
<muurkha> but it's not that far from the Böhm–Jacopini or Dijkstra approaches to structured control flow, in the sense that a routine is built up from atomic statements using some sort of algebraic operators
<muurkha> the key difference is that the COMFY operators or combining forms have two exits instead of one, allowing them to naturally express a much richer set of programs, though maybe not everything you'd need for BCPL
<gordonDrogon> call me old fashioned (or just dull and imaganative) but I do like my C-like things..
<gordonDrogon> probably as I've spent 40+ year writing it or basic or asm - with brief detours to occam, fortran, a bit of perl and php ... (but php is just sloppy, interpreted C).
<muurkha> something like comfy is a lot easier to do in perl or php than c, basic, bcpl, or fortran
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<gordonDrogon> maybe ... if it were something you actually wanted to do... right now - as I get older I am tending to stick to things I enjoy..
<gordonDrogon> like suppertime - which is what it is now :)
<muurkha> enjoy!
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<muurkha> in a sense I guess wasm is the best current UNCOL for this kind of thing, but a wasm implementation isn't simple
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<dh`> if I were going to write a compiler for an 8-bit target and intend to use it for anything serious, I'd probably start with C and rearrange it as seemed necessary or helpful
<dh`> you gain 0 by starting from pascal and basic remains terrible
<dh`> what was that language developed for motes? nesc?
<muurkha> sounds right
<muurkha> you could start with Verilog instead ;)
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<muurkha> the 65816 is better in this respect, the 6502 or 8080 or Z80 is a real pain in C or Pascal because there's no indexed-offset addressing mode, and in C and Pascal by default all your local variables have automatic storage duration, they live on the stack
<muurkha> COMFY-65 handled this kind of thing by using shallow binding in the 6502's zero page
<muurkha> another difficulty may be (not sure about this one!) is that in C and maybe Pascal most arithmetic is defined to be done in ints, but ints have to be at least 16 bits, and 16-bit arithmetic is pretty expensive there
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<muurkha> RISC-V is pretty decent for this kind of thing though
<muurkha> though a base+index+scaledoffset addressing mode would be nice for stack-allocated arrays maybe?
<jrtc27> you don't get that even on aarch64
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<muurkha> aw
<gordonDrogon> the 65816 is better in that it has a 16-bit accumulator, but loading an 8-bit value into it requires masking as when the Acc is in 16-bit mode, so is the RAM.
<gordonDrogon> that costs me 4 cycles in the bytecode instruction fetch routine.
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<muurkha> yeah, you mentioned that the other day
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<dh`> re ints being 16 bits, that's why "start with C"
<dh`> would probably end up with i8/u8/i16/u16 native types
<dh`> and forget "int" entirely
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<muurkha> yeah, that's probably best
<dh`> there's a reason most serious work on 8-bit machines was done in asm
<muurkha> yup
<muurkha> it wasn't just that BDS C came around at the end of the 8-bit era
<dh`> I kind of feel like this kind of thing (writing modern software specifically for vintage platforms) is better done on small 32-bit machines
<dh`> stuff comparable to mid-80s macs or amigas for example
<josuah> division of floats could be a bit teidious by hand in assembly every time
<josuah> who said it had to be done by hand though, one can use functions and libraries in asm too ofc
<dh`> standard practice on the C64 was to call undocumented entry points in the BASIC ROM
<dh`> anyway, sys161 is a small 32-bit machine :-)
<muurkha> vexriscv is a small 32-bit machine
<josuah> I see a lot of talks around FPGA
<muurkha> it's a much cheaper way to prototype than a MOSIS run
<josuah> maybe it is because FPGA are the tools that are ubiquitous when it comes to CPU implementation
<muurkha> also when programmers get hold of an FPGA our first thought of what to do with it is to turn it into a conventional computer with CPU and RAM
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<josuah> it could be nice if there was any open architecture with plenty of learning material available :^)
<josuah> (yes of course I mean RISC-V)
<josuah> so we end-up with a lot of FPGA talk
<muurkha> also there are actual uses for FPGAs that benefit from having a CPU in them to kind of script the other parts
<josuah> which is convenient as I'd like to try myself some day :)
<josuah> which would make the FPGA a CPU (convenient to debug, with machine code acting as some kind of scripting) onto which are plugged custom peripherals
<muurkha> right
<josuah> that looks quite convenient
<josuah> I got myself a Tang Nano 9k, let's see if I can blink it some day or I'll go for an ICE40
<muurkha> oh neat
* josuah bookmarks that link
<josuah> but for now, I still struggle with *using* well-documented peripherals
<muurkha> also VexRiscv can fit into an iCE40, I'd forgotten that: https://github.com/SpinalHDL/VexRiscv
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<josuah> there is that "NMSIS" thing by nucleisys.com (who did the IP core of the GigaDevice GD32VF103) that looks like ARM's CMSIS - https://doc.nucleisys.com/nmsis/introduction/introduction.html
<josuah> is it anything widely known or only NucleiSys trying to become the ARM of China?
<muurkha> I have this vague memory that Claire Wolf, the iCEStorm author, wrote VexRiscv
<muurkha> not sure
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<josuah> looks like great material to learn how a processor works
<muurkha> I think maybe a computer organization textbook would be a better starting point?
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<josuah> much more affordable than I thought! https://tinyvision.ai/products/upduino-v3-0
<josuah> the power of throwing out useless garbage out of boards :)
<muurkha> anyway I think using well-documented peripherals is usually a problem for everyone
<josuah> muurkha: like "Computer Organization and Design" Patterson/Hennessy? Or another approach?
<muurkha> that kid of thing, yeah
<muurkha> *kind
<muurkha> I haven't read Hennessy & Patterson but I hear it's good
<muurkha> I'm pretty sure it'll be more approachable than a giant pile of Verilog
<josuah> hahaha, yeah sure
<josuah> a giant pile of verilog is what you might end-up working with in a real-world job though
<muurkha> yeah, but you probably don't want to try to learn what a read-after-write hazard is from the verilog
<muurkha> I mean, given that there are better options out there
* josuah scratches these words in a corner of its mind, just in case a verilog-frenesy comes
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<muurkha> oh, picorv32 is claire wolf's design. vexriscv is presumably somebody else, I just got them mixed up
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