<bslsk05>
pcsupport.lenovo.com: laptops and netbooks :: gaming series :: ideapad gaming 3 15arh05 :: 82ey :: 82ey000vmx :: pf32yqwm Lenovo PC Support - Lenovo Support IS
<nikolapdp>
kind of similar to mine, except mine doesn't have a dedicated gpu
<gog>
the keyboard has this fucky weirdness about it which it hasn't been exhibiting for the last few days
<gog>
idk what it's about
<gog>
but the s key was hit or miss for awhile, then it was sending multiples, now it's fine
<nikolapdp>
odd
<gog>
yes
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<nikolapdp>
and that's what happened when it was new
<nikolapdp>
?
<zid>
My keyboard likes to randomly insert a different character sometimes
<nikolapdp>
are you sure it's not your parkinsons'
<zid>
1/10000 chance that you get a 9 instead of a u or something
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<heat>
mjg, those readlinks, are they disambiguating -l switches from obj files?
<heat>
and if so, why readlink and not access or stat
<Mondenkind>
i mean i can imagine bad ways of making it work
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* vdamewood
sniffs gog
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<nikolar>
Are there systems with cache line sizes >16 in common use
<Mondenkind>
>16 what
<nikolar>
Erm bytes, my bad
<Mondenkind>
yes
<nikolar>
Do you know any
<Mondenkind>
i'm typing on one right now
<Mondenkind>
and i expect you are too
<Mondenkind>
usually like 64b
<nikolar>
Are there any with like 256 or 512
<Mondenkind>
i don't think so
<nikolar>
I've read somewhere that there are but it sounds like a bit much
<zid>
I imagine that'd work great on supercomputery vliwy stuff
<zid>
like, you wouldn't care if it was 512B if you're exclusively running avx-512 streamy stuff
<nikolar>
Guess so
<nikolar>
But I doubt that server processors have that much
<nikolar>
Like it's the same microarch
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<geist>
nikolar: pretty much all are like 32 or 64
<geist>
i've seen 128 byte cache lines (thunder x1 cpus) but i think the standard is 64 for the most part
<geist>
i've also seen on i thinnk some of the x86 cpus having an L2 or L3 cache hae double the cache line size as the L1
<geist>
which makes sense, caches farther out could easily deal with that
<Mondenkind>
i've not seen that, more usually 'adjacent line prefetch'
<geist>
yeah i forget which one i saw it on
<Mondenkind>
so if you fetch a 64b cache line its buddy comes along for the ride into l2/l3 (and not into l1) but then it can get kicked out separately later
<Mondenkind>
i think apple cpus do that though with the two line sizes
<geist>
possibly yeah
<geist>
also there's a trend of these distant whole-memory caches
<Mondenkind>
huh?
<geist>
different names for it, but kinda like a cache at the DRAM controller, so that it's totally invisible to everything
<geist>
i dunno what the correct compsci name is, but i've seen it on a lot of the newer high end ARM socs, including the apple M1+
<geist>
it's kinda like a L4, but basically completely invisible to anything, including DMA, so you can logically think of it as a cache on the DRAM controller
<Mondenkind>
hrm. makes sense i guess?
<geist>
SLC (system level cache) i've seen thrown around
<mjg>
is there a context to that 16 byte question tho
<geist>
yah especially for SOCs where the gpu and cpu and all these devices are sharing the same memory
<mjg>
pretty weird as is
<Mondenkind>
i wonder if it's for power more than speed
<geist>
very possibly
<Mondenkind>
no that doesn't make sense
<geist>
apple cpus do it, i've seen it on samsung and qualcomm and google's smartphone cpu
<geist>
seems to just be the defacto solution for high end smartphone/tablet class ARM socs now
<geist>
anyway in that case the cache line could also be whatever size it wants to be for implementation purposes
<geist>
since for the most part you'd probably only need to flush or invalidate it around power events
<Ermine>
tlp somewhy switched me from intel_pstate to intel_cpufreq
<Ermine>
... bacause i chose passive opmode
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<nikolar>
mjg basically what's the required aligned to avoid false sharing
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<mjg>
depends, by default you roll with 64 within structs
<bslsk05>
www.phoronix.com: Linux Looking To Make 5-Level Paging Support Unconditional For x86_64 Kernel Builds - Phoronix
<zid>
I appreciate that approach in general, but it seems a little.. overkill?
<zid>
it's not like removing the option removes any code
<zid>
just stops pml4 only builds existing
<zid>
you still need the pml4 only codepath, you still need the pml5 codepath, you still need a bunch of runtime checks for which to use
<nikolar>
Does that mean that all kernels will work with both?
<nikolar>
Yeah
<geist>
for what it's worth most modern arches at least either have it hard coded or a way to query it
<Ermine>
I guess less #ifdef CONFIG_ clutter
<mjg>
i'm guessing that's mostly to reduce maintenance burden
<mjg>
not for any gainz for anyone
<geist>
yeah it's not that they're forcing 5 level, just make it so that it can choose to use it by default
<geist>
i'm guessing there's probably a command line switch to force it back to 4 even if the hardware supports 5
<geist>
in case there's some slight performance delta, etc
<geist>
stupid intel for not just making it per aspace, like ARM
<geist>
even FRED doesn't fix that
<mjg>
there very well may be dragons in the silicon
<geist>
oh almost certainly. the downsides of having so much legacy, there are probably whole blocks of verilog they dont want to change, etc
<geist>
so there would be a very strong reason to not futz with it
<geist>
practically speaking
<mjg>
ye
<mjg>
realistically the 5th level iso for such a miniscule amount of people
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<mjg>
it does not make a difference
<geist>
would be interesting to see what the performance delta may be for an additional PTE level. depends on TLB miss hit rate and how well the PT walker cache works
<geist>
which is mostly invisible on both intel and amd, though clearly present
<geist>
also obviously depends on the clustering of the test cases, etc
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<geist>
would have to be a Real World test
<mjg>
fuck that, just declare there is no difference
<mjg>
it's i/o bound to the network
<geist>
i assume you jest, considering how much your'e about benchmarks
<mjg>
dude my rants about geezers which take shit out of their asses take second place after rants about solaris
<mjg>
which btw is also turbo geezered
<geist>
okay,so it was sarcasm
<mjg>
i'm also more about profiling than benchmarks,
<geist>
can't tell with you
<mjg>
:sadface:
<geist>
tis why i try to make it obvious or put a sarcasm tag or whatnot. lots of it gets lost in IRC and translation
<geist>
i guess discord you'd put a gif afterwards that uses up half the page with some cute thing
<zid>
my kingdom hearts crashed :(
<geist>
eep
<mjg>
:shieeet:
<geist>
i reinstalled my main home server with proxmox yesterday and re-set up a large VM that acts like the old box's native OS
<geist>
working pretty well, i gotta admit it's a pretty slick system for free
<Ermine>
I stumble upon proxmox when googling for lxc stuff pretty often
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<geistpdp>
nice, still connected
<geist>
yeah it has support for lxc
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<geistpdp>
time to shut the pdp down, let it rest a bit
<geistpdp>
/me waves
<geistpdp>
(interesting, it doesn't do /me)
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<nikolapdp>
bye
<geist>
but shows you how stable it is on real hardware
<geist>
ran for a few days with no trouble
<geist>
it's loud though, sometimes it get son your nerves, wanted to shut it down to get my hearing back
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<nikolapdp>
nice to see it working
<nikolapdp>
did you sort out the line wrap issue
<mjg>
e10k in the basement when
<geist>
surprisngly it doesn't burn that much power, only about 80W
<geist>
but i bet a solid 20 of it goes into the old style AC fans
<nikolapdp>
heh neat
<nikolapdp>
i really want to get one, at least one of the small ones but they are basically unobtainable over here
<nortti>
geist: how reasonable would it be to mod it to use 12V fans?
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<geist>
oh it'd probably be fine, but actually it is shoving a lot of air through it, so i think you'd need some fairly beefy fans to get the same effect
<geist>
part of the noise is just the amount of air it's moving, it's a rack mounted thing ultimately, though it's shoving the air through sideways FWIW
<geist>
i took it apart at some point and re greezed their bearings but i didn't take any pics
<geist>
the power supply is a monster and the fans are part of that assembly
<zid>
geist your accent is showing
<geist>
oh yeah?
<zid>
regreased :p
<nikolar>
lel
<geist>
ah. nah i just didn't bother trying to spell it right
<zid>
right but you only spell it with a z if you have that accent that says it with a z, surely
<geist>
but yeah. you're right. honestly 'grease' as a word looks a bit off for me
<geist>
oh i definitely do
<zid>
so your accent was infact, showing
<geist>
that's probably why it looks off to me, since i say 'gree-z'
<zid>
I have the opposite with 'houses'
<geist>
yah i'd say 'how-zez'
<zid>
I say houzes and greased, I've seen americans who say houses and greazezd
<zid>
I should find one and duel him to the death
<geist>
i think that's a bit different from the local seattle proper accent which would be more of a proper houses saying
<geist>
i bet the s -> z thing is the overall summary and some southern thing
<geist>
just took the spark plug out of my vespa trying to find a reacplement online
<geist>
geez there's like 15 different variants
<geist>
no standard it seems for spark plugs
<zid>
Just look up what the oem gave for the specific model of vespa you have?
<zid>
as long as it has the right thread pattern and spark gap etc it'll be fine though
<geist>
yah i have a champion RG6YC in it, which i can always order
<geist>
though it's basically the cheapest thing on the market
<geist>
looks like a NGK CR8EIB is a solid replacement and higher quality
<zid>
what have you been doing to it such that you've been eating spark plugs though
<geist>
honestly nothing, but it's got like 6k miles and 15 years on it, so i think it's time
<geist>
i dot think it's fouled, but it's not running well lately, been missing somewhat and whatnot
<geist>
so i pulled it out. it doesn't seem to have a lot of carbon buildup, but figured what the hey
<zid>
you can just scrape the fouling off
<zid>
as long as the electrode isn't super worn down