klange changed the topic of #osdev to: Operating System Development || Don't ask to ask---just ask! || For 3+ LoC, use a pastebin (for example https://gist.github.com/) || Stats + Old logs: http://osdev-logs.qzx.com New Logs: https://libera.irclog.whitequark.org/osdev || Visit https://wiki.osdev.org and https://forum.osdev.org || Books: https://wiki.osdev.org/Books
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<heat> zid`, AMD K7 Athlon – microarchitecture of the AMD Athlon classic and Athlon XP microprocessors. Was a very advanced design for its day. First generation was built with a separate L2-cache chip on a board inserted into a slot (A) and introduced extended MMX. The second generation returned to the traditional socket form factor with fully integrated L2-cache running at full speed. The third generation, branded as XP, introduced full support for SSE.
<zid`> Thanks bro
<zid`> You've gotten a meme stuck to the bottom of your shoe and tracked it into the channel btw
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<Jari--_> morning from Finland EU
* Jari--_ got some ideas on how to implement semantic A.I. and integrate it into the OS
<Jari--_> practical solutions, algorithms, etc. googled for months
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<sham1> Machine learning to do things like scheduling
<sham1> "Adaptive scheduling"
<sham1> Anyway, the choice of algorithm really would depend on what you're trying to do with the AI
<sham1> Hell, you would most likely not even need "complicated" things like neural networks to do stuff, but again, it depends
<sham1> I suppose the biggest problem would be to a) gather the data set necessary and b) to train the damn model. You obviously would have to avoid overfitting, so something like k-fold cross-validation for training whatever model you'd be doing would be what you'd go for
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<dinkelhacker> Can someone explain me what the 'table entry' is in aarch64 mmu long descriptor format? https://developer.arm.com/documentation/den0024/a/The-Memory-Management-Unit/Translation-tables-in-ARMv8-A/AArch64-descriptor-format
<bslsk05> ​developer.arm.com: Documentation – Arm Developer
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<dinkelhacker> My understanding is that at L1 and L2 tables I either point to subsequent table with a table descriptor or I directly map the block of memory (block entry).
<dinkelhacker> But what's the table entry then?
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<ddevault> this page is not a good source
<ddevault> you want
<ddevault> D8.3
<ddevault> dinkelhacker: ^
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<x8dcc> hello, I am trying to implement the simple getchar function I mentioned yesterday, but I have a small issue
<x8dcc> I use an array to store the user's input chars, and it gets updated in the keyboard IRQ handler. This array is checked by the actual getchar function to check if its empty, and wait until it has a value
<x8dcc> the problem is that with -O2 the compiler optimizes this empty while loop, so it never exits. Is there any way I can specify the compiler to make that check volatile?
<x8dcc> afaik making the "static char[]" volatile *should* fix it, but I don't know if there is a better way since all the other array operations (for example in the kb handler) would not get optimized
<clever> x8dcc: without volatile, gcc assumes there are no other things (threads/irq) that could change a variable
<clever> and if a var is seen to have some value, it wont bother checking it again, until the local code has change it
<x8dcc> yeah, with -O0 it works fine (at least that part)
<clever> it can help to read the generated asm, and see what its really doing
<x8dcc> clever: so making that array volatile would be the only way to tell the compiler to check that? my loop is literally "while (getchar_arr[pos] == EOF);"
<clever> yeah, making the array volatile is one option
<x8dcc> I guess since it's a simple function I could write it in assembly, but it seems kinda sketchy
<clever> you could also have seperate read and write pointers, rather then relying on a magic value in the array
<clever> and then make only those pointers volatile
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<x8dcc> oh, wait, I could declare a local pointer to that array in that function and make that volatile, that could work too, right?
<x8dcc> not sure if its what you meant but that could work
<clever> have a read_pos and a write_pos index into the array
<clever> the writer increments write_pos after writing data
<clever> the reader increments read_pos after reading
<clever> if readpos == writepos, then there is no data in the buffer
<clever> and make writepos volatile
<clever> plus some logic to wrap when you hit the end of the array
<x8dcc> I see what you mean
<x8dcc> yeah, I already check that
<geist> yah make the head/tail pointers volatile. you'l;l want to anyway
<geist> later on there are better ways of locking/synchronizing this, but for now spinning on some volatile regs will do t
<geist> the array should probably be volatile too
<x8dcc> okay, I fixed this part, something else is still broken but it's progress
<geist> yay
<x8dcc> thank you for the suggestions :)
<clever> printf all the vars on every iteration?
<x8dcc> hm?
<clever> to debug what is making it not work
<x8dcc> I'm going to use gdb since someone here told me how to use it without patching it lol
<clever> ah, that can help a lot
<x8dcc> yeah, I love gdb
<clever> my main target lacks gdb support
<x8dcc> what do you mean? why?
<geist> oh no now you're gonna hear about it!
<clever> the cpu isnt supported by gdb, and the jtag interface isnt documented publicly
<x8dcc> haha
<clever> i would have to implement my own gdbserver stub from scratch
<x8dcc> oh I see
<x8dcc> a nice vacation project is all I see
<clever> and even then, there is the problem of what if the gdb server crashes?
<clever> simpler to just printf debug my way to answers
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<x8dcc> meta-debug the debugger
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<mrvn> x8dcc: volatile isn't enough when you have multiple cores.
<mrvn> You need the hardware approriate memory barriers around each access so you might as well use atomic and let the compiler handle that.
<geist> mrvn: we know this, we're just trying to keep it simple for now
<geist> this spinning on volatile thing is not the ultimate solution, but will work for now until proper blocking/etc is immplemented
<mrvn> except it has race conditions and will drop keys randomly and isn't really simpler than atomic.
<mrvn> you can spin on atomic too
<geist> feel free to help them implement atomics
<mrvn> thank good for builtins
<mrvn> -o
<geist> feel free to help them implement wrappers for the builtins, etc
<geist> x8dcc: i never asked, what architecture are you working with here?
<mrvn> also C or C++?
<mrvn> and what standard version
<mrvn> .oO(volatile being deprecated makes it rather more complex in newest standards)
<x8dcc> okay, I fixed it completely
<x8dcc> mrvn: for now I am only working with 1
<x8dcc> geist: I want to make it 32 bit
<geist> sure, but what architecture? x86?
<x8dcc> yes
<x8dcc> I am not sure if I will end up adding ring3 userspace or everything ring0
<geist> yah that comes quite a ways down the road
<x8dcc> I kinda like both ideas, I know ring3 is obviously better
<x8dcc> mrvn: C, I am not using any C++ code
<mrvn> urgs. you might want to rethink that. Unless you want an OS for some industrial PC boards 32bit just forces you to learn stuff you never need again and adds problems you rather wouldn't have.
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<mrvn> I assume you don't actually have a 32bit only cpu?
<x8dcc> no I don't, but what do you mean? rethink using cpp?
<geist> i think they're talking about rethinking x86-32
<geist> since presumably you're using x86-64 now?
<demindiro> x64 is better in pretty much every way
<mrvn> x8dcc: rething going to 64bit long mode
<demindiro> Larger address space, more registers etc
<x8dcc> geist: my host machine is x86-64, yes
<demindiro> RIP relative addressing especially
<geist> mrvn: or you mean the opposite? *not* going to long mode?
<mrvn> no, I mean he should take the leap and go long mode.
<mrvn> The little time spend learning how to switch to long mode is well worth it. Easily saved later one because the arch is just better.
<geist> but they already are aren't they?
<x8dcc> well for now I want to keep making it 32 bit, and maybe I will switch in the future
<demindiro> I would do it now
<geist> oh! you're in 32bit x86
<geist> i see. yeah you'll want to switch fairly soon, trouble is of course all the page table stuff, which to a newbie is a big pile of nonsense
<demindiro> It's a tiny effort that'll save you headaches later
<x8dcc> hmm, I will think about it
<geist> but anyway, i'm happy you're making progress with IRQs and whatnot. what i'd personally do is flesh that out a bit, get handy with interrupts and generally speaking building up some infrastructure for kernel mode
<x8dcc> now that I have getchar, I can focus on the #1 most important priority. The pc speaker piano.
<geist> then basically start over with what you know, go directly to x86-64
<geist> oh or the pc speaker piano. sure if you have a specific goal x86-32 will do that just fine
<x8dcc> geist: yeah, is what I thought initially, start with this and once I know what I am doing, maybe try 64bit
<geist> and honestly you dont even need interrupts for that, can just poll the keyboard
<mrvn> x8dcc: with just single tones or mixing multiple key preses?
<mrvn> also: 1 bit sound quality sucks.
<mrvn> been there, done that. :)
<x8dcc> heresy
<x8dcc> it is perfect in every way
<x8dcc> anyway, I guess for now single tones, not sure how hard it is to mix them
<mrvn> ever done sound recording by polling the dataset port on the C64?
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<x8dcc> the piano thing is just a dumb game, btw, it's obviously not my final goal haha
<geist> well it *is* a timer on the PC, so its not quite as bad as having to manually flip the speaker back and forth (ie, apple 2)
<mrvn> x8dcc: hard. you have to compute the wave form and then turn the speaker on/off to make the waveform. Single tone you just set a pitch and volume.
<geist> at least with PC you're basically furiously reprogramming a square wave generator
<x8dcc> mrvn: I don't know what the "dataset port on the C64" is
<x8dcc> mrvn: isn't that what doom used? I think I read something like that in the osdev wiki or somewhere else
<mrvn> x8dcc: it's where you connect the tape recorder to load/save data. It has a low and high pass filter on it so you can detect 2 tones.
<x8dcc> damn, that sounds extremely easy and friendly
<mrvn> So recroding from it all you get is 2 frequencies basically.
<mrvn> 1 bit quality too. it's beRAUSCHend.
<geist> heh i wouldn't call that extremely easy and friendly
<geist> more like, slightly more functional
<x8dcc> do you know if the templeos piano app supports multiple key presses? I am guessing it does
<x8dcc> that app (and templeos in general) would be my ideal perfect os, but you know, I am not him
<mrvn> x8dcc: blasphemer. Thou shall have no other OSes than TempelOS.
<x8dcc> amen
<x8dcc> you should search the "adulteress" video of templeos, truly beautiful
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<sham1> TempleOS. Did Terry ever conclude that it indeed is the 3rd Temple™?
<kof123> i always took at as somewhat tongue in cheek, no idea
* kof123 points up like alchemist
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